CFP (NBB)-68-582.2569 mm² 24.13 x 24.13

The LM98640QML-SP is a fully integrated, high performance 14-Bit, 5-MSPS to 40-MSPS signal processing solution. The Serial LVDS output format performs well during single event exposure, preventing data loss. The LM98640QML-SP has an adaptive power scaling feature to optimize power consumption based on the operating frequency and amount of gain required. High-speed signal throughput is achieved with an innovative architecture utilizing Correlated Double Sampling (CDS), typically employed with CCD arrays, or Sample and Hold (S/H) inputs (for CIS and CMOS image sensors). The sampling edges are programmable to a resolution of 1/64th of a pixel period. Both the CDS and S/H have a programmable gain of either 0 dB or 6 dB. The signal paths utilize two ±8-bit offset correction DACs for coarse and fine offset correction, and 8-bit Programmable Gain Amplifiers (PGA) that can be programmed independently for each input. The signals are then routed to two on chip 14-bit 40-MHz high performance analog-to-digital converters (ADC). The fully differential processing channel provides exceptional noise immunity, having a very low noise floor of –79 dB at 1x gain.