0
ACTIVE
Function |
Receiver |
Protocols |
LVDS |
Number of transmitters |
0 |
Number of receivers |
2 |
Supply voltage (V) |
1.8, 3.3 |
Signaling rate (Mbps) |
600 |
Input signal |
LVDS |
Output signal |
CMOS, LVCMOS, LVTTL, TTL |
Rating |
Automotive |
Operating temperature range (°C) |
-40 to 105 |
WSON (DEM)-8-4 mm² 2 x 2
The DS90LVRA2-Q1 is a dual CMOS differential line receiver designed for applications requiring high input common mode range, high data rates, and CMOS output with slew rate control. The device is designed to support data rates of 600Mbps (300MHz) utilizing low voltage differential signaling (LVDS) technology.
The DS90LVRA2-Q1 accepts low voltage (350mV typical) differential input signals and translates them from 1.8V to 3.3V CMOS output levels depending on power supply voltage. The DS90LVRA2-Q1 has a flow-through design for easy PCB layout.
The DS90LVRA2-Q1 and companion LVDS line driver DS90LV027AQ provide a new alternative to high power PECL/ECL devices for high speed point-to-point interface applications.
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