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DS90CF384AQ-Q1
  • DS90CF384AQ-Q1

DS90CF384AQ-Q1

ACTIVE

+3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link - 65MHz - Automotive Grade

Texas Instruments DS90CF384AQ-Q1 Product Info

1 April 2026 0

Parameters

Applications

In-vehicle Infotainment (IVI)

Input compatibility

FPD-Link LVDS

Function

Deserializer

Output compatibility

LVCMOS

Color depth (bpp)

24

Features

Low-EMI Point-to-Point Communication

EMI reduction

LVDS

Rating

Automotive

Operating temperature range (°C)

-40 to 85

Package

TSSOP (DGG)-56-113.4 mm² 14 x 8.1

Features

  • Automotive Grade Device, AEC-Q100 Grade 3 Qualified
  • Operating Temperature Range: –40°C to +85°C
  • 20 to 65 MHz Shift Clock Support
  • 50% Duty Cycle on Receiver Output Clock
  • Best–in–Class Set & Hold Times on RxOUTPUTs
  • Rx Power Consumption <142 mW (typ) @65MHz Grayscale
  • Rx Power-down Mode <200μW (max)
  • ESD Rating >7 kV (HBM), >700V (EIAJ)
  • Supports VGA, SVGA, XGA and Dual Pixel SXGA.
  • PLL Requires No External Components
  • Compatible with TIA/EIA-644 LVDS Standard
  • Low Profile 56-Lead TSSOP Package

All trademarks are the property of their respective owners.

  • Automotive Grade Device, AEC-Q100 Grade 3 Qualified
  • Operating Temperature Range: –40°C to +85°C
  • 20 to 65 MHz Shift Clock Support
  • 50% Duty Cycle on Receiver Output Clock
  • Best–in–Class Set & Hold Times on RxOUTPUTs
  • Rx Power Consumption <142 mW (typ) @65MHz Grayscale
  • Rx Power-down Mode <200μW (max)
  • ESD Rating >7 kV (HBM), >700V (EIAJ)
  • Supports VGA, SVGA, XGA and Dual Pixel SXGA.
  • PLL Requires No External Components
  • Compatible with TIA/EIA-644 LVDS Standard
  • Low Profile 56-Lead TSSOP Package

All trademarks are the property of their respective owners.

Description

The DS90CF384AQ receiver converts the four LVDS data streams at up to 1.8 Gbps throughput (227 Megabytes/sec bandwidth) back into parallel 28 bits of LVCMOS/LVTTL data. In a Display application, the 28 bits include: 24 bits of RGB data and up to 4 bits of video control (Hsync, Vsync, DE and CNTL).

The DS90CF384AQ device is enhanced over prior generation FPD-Link receivers, provides a wider data valid time on the receiver output and is offered as an AEC-Q100 grade 3 device.

FPD-Link is an ideal means to solve EMI and cable size problems associated with wide, high speed LVCMOS/LVTTL interfaces.

The DS90CF384AQ receiver converts the four LVDS data streams at up to 1.8 Gbps throughput (227 Megabytes/sec bandwidth) back into parallel 28 bits of LVCMOS/LVTTL data. In a Display application, the 28 bits include: 24 bits of RGB data and up to 4 bits of video control (Hsync, Vsync, DE and CNTL).

The DS90CF384AQ device is enhanced over prior generation FPD-Link receivers, provides a wider data valid time on the receiver output and is offered as an AEC-Q100 grade 3 device.

FPD-Link is an ideal means to solve EMI and cable size problems associated with wide, high speed LVCMOS/LVTTL interfaces.

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