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DS42MB100
  • DS42MB100
  • DS42MB100

DS42MB100

ACTIVE

4.25-Gbps 2:1/1:2 CML mux/buffer with transmit pre-emphasis and receive equalization

Texas Instruments DS42MB100 Product Info

1 April 2026 3

Parameters

Function

Equalizer, Mux buffer

Protocols

CML, LVDS, LVPECL

Number of transmitters

1, 2

Number of receivers

1, 2

Supply voltage (V)

3.3

Signaling rate (Mbps)

4250

Input signal

CML

Output signal

CML

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Package

WQFN (NJK)-36-36 mm² 6 x 6

Features

  • 2:1 Multiplexer and 1:2 Buffer
  • 0.25-Gbps to 4.25-Gbps Fully Differential Data Paths
  • Fixed Input Equalization
  • Programmable Output Pre-Emphasis
  • Independent Pre-Emphasis Controls
  • Programmable Loopback Modes
  • On-Chip Terminations
  • ESD Rating of 6-kV HBM
  • 3.3-V Supply
  • Lead-Less WQFN-36 Package
  • –40°C to +85°C Operating Temperature Range
  • 2:1 Multiplexer and 1:2 Buffer
  • 0.25-Gbps to 4.25-Gbps Fully Differential Data Paths
  • Fixed Input Equalization
  • Programmable Output Pre-Emphasis
  • Independent Pre-Emphasis Controls
  • Programmable Loopback Modes
  • On-Chip Terminations
  • ESD Rating of 6-kV HBM
  • 3.3-V Supply
  • Lead-Less WQFN-36 Package
  • –40°C to +85°C Operating Temperature Range

Description

The DS42MB100 device is a signal conditioning 2:1 multiplexer and 1:2 fan-out buffer designed for use in backplane-redundancy or cable driving applications. Signal conditioning features include continuous time linear equalization (CTLE) and programmable output pre-emphasis that enable data communication in FR4 backplane up to 4.25 Gbps. Each input stage has a fixed equalizer to reduce ISI distortion from board traces.

All output drivers have four selectable levels of pre-emphasis to compensate for transmission losses from long FR4 backplane or cable attenuation reducing deterministic jitter. The pre-emphasis levels can be independently controlled for the line-side and switch-side drivers. The internal loopback paths from switch-side input to switch-side output enable at-speed system testing. All receiver inputs are internally terminated with 100-Ω differential terminating resistors. All driver outputs are internally terminated with 50-Ω terminating resistors to VCC.

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