Product
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DS10BR150
  • DS10BR150
  • DS10BR150
  • DS10BR150

DS10BR150

ACTIVE

1.0-Gbps LVDS buffer/repeater

Texas Instruments DS10BR150 Product Info

1 April 2026 0

Parameters

Function

Buffer

Protocols

CML, LVDS, LVPECL

Number of transmitters

1

Number of receivers

1

Supply voltage (V)

3.3

Signaling rate (Mbps)

1000

Input signal

CML, LVDS, LVPECL

Output signal

LVDS

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Package

WSON (NGQ)-8-9 mm² 3 x 3

Features

  • DC - 1.0 Gbps Low Jitter, High Noise Immunity, Low Power Operation
  • On-chip 100Ω Input and Output Termination Minimizes Insertion and Return Losses, Reduces Component Count and Minimizes Board Space
  • 7 kV ESD on LVDS I/O Pins Protects Adjoining Components
  • Small 3 mm x 3 mm 8-WSON Space Saving Package

All trademarks are the property of their respective owners.

  • DC - 1.0 Gbps Low Jitter, High Noise Immunity, Low Power Operation
  • On-chip 100Ω Input and Output Termination Minimizes Insertion and Return Losses, Reduces Component Count and Minimizes Board Space
  • 7 kV ESD on LVDS I/O Pins Protects Adjoining Components
  • Small 3 mm x 3 mm 8-WSON Space Saving Package

All trademarks are the property of their respective owners.

Description

The DS10BR150 is a single channel 1.0 Gbps LVDS buffer optimized for high-speed signal transmission over lossy FR-4 printed circuit board backplanes and balanced cables. Fully differential signal paths ensure exceptional signal integrity and noise immunity.

Wide input common mode range allows the receiver to accept signals with LVDS, CML and LVPECL levels; the output levels are LVDS. A very small package footprint requires a minimal space on the board while the flow-through pinout allows easy board layout. The differential inputs and outputs are internally terminated with a 100Ω resistor to lower device input and output return losses, reduce component count and further minimize board space.

The DS10BR150 is a single channel 1.0 Gbps LVDS buffer optimized for high-speed signal transmission over lossy FR-4 printed circuit board backplanes and balanced cables. Fully differential signal paths ensure exceptional signal integrity and noise immunity.

Wide input common mode range allows the receiver to accept signals with LVDS, CML and LVPECL levels; the output levels are LVDS. A very small package footprint requires a minimal space on the board while the flow-through pinout allows easy board layout. The differential inputs and outputs are internally terminated with a 100Ω resistor to lower device input and output return losses, reduce component count and further minimize board space.

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