- 32-Channel AFE for Ultrasound Applications:
- LNA, Attenuator, LPF, ADC, CW Mixer, and Digital I/Q Demodulator
- Digital Time Gain Compensation (DTGC)
- Total Gain Range: 0 dB to 48 dB
- Low-Noise Amplifier (LNA) With Programmable Gain:
- Low Current Noise of 1pA/rtHz
- Gain: 21 dB, 18 dB, and 15 dB
- Linear Input Range: up to 700 mVPP
- Programmable Attenuator (ATTEN):
- Attenuation Range (Steps of 0.125 dB):
0 to 36 dB - Digital TGC Engine
- Programmable Gain Amplifier (PGA):
- Gain: 21 dB, 24 dB, and 27 dB
- Third-Order, Linear-Phase, Low-Pass Filter (LPF):
- Cut-off Frequency From 10 MHz to 25 MHz
- 16 ADCs Converting at 12-Bit, 80 MSPS or 10-Bit, 100 MSPS:
- Each ADC Converts Two Sets of Inputs at Half Rate
- 12-Bit Mode: 72-dBFS SNR
- 10-Bit Mode: 61-dBFS SNR
- TGC Mode Power w/o digital I/Q Demodulator:
- Lowest Power of 18.5 mW/Ch in Low Power Mode, 4 nV/rtHz, 10-Bit, 20 MSPS, LVDS (2x rate)
- 27.8 mW/Ch at 3 nV/rtHz in Low Noise Mode at 12-Bit, 40 MSPS
- 24.4 mW/Ch at 4 nV/rtHz in Low Power Mode at 12-Bit, 40 MSPS
- Excellent Device-to-Device Gain Matching:
- Harmonic Distortion: –55 dBc level
- Fast and Consistent Overload Recovery
- Continuous Wave (CW) Path With:
- Low Close-In Phase Noise of –148 dBc/Hz at 1-kHz Frequency Offset off 5-MHz Carrier
- Power Consumption w/o Signal: 10 mW/Ch
- Phase Resolution: λ/16
- 12-dB Suppression on Third and Fifth Harmonics
- Digital I/Q demodulator:
- Decimation Filter M = 1 to 63
- Data Throughput Reduction After Decimation
- On-Chip RAM with 32 Preset Profiles
- LVDS Interface with a Speed Up to 1-Gbps
- Small Package: 15-mm × 15-mm NFBGA-289
- 32-Channel AFE for Ultrasound Applications:
- LNA, Attenuator, LPF, ADC, CW Mixer, and Digital I/Q Demodulator
- Digital Time Gain Compensation (DTGC)
- Total Gain Range: 0 dB to 48 dB
- Low-Noise Amplifier (LNA) With Programmable Gain:
- Low Current Noise of 1pA/rtHz
- Gain: 21 dB, 18 dB, and 15 dB
- Linear Input Range: up to 700 mVPP
- Programmable Attenuator (ATTEN):
- Attenuation Range (Steps of 0.125 dB):
0 to 36 dB - Digital TGC Engine
- Programmable Gain Amplifier (PGA):
- Gain: 21 dB, 24 dB, and 27 dB
- Third-Order, Linear-Phase, Low-Pass Filter (LPF):
- Cut-off Frequency From 10 MHz to 25 MHz
- 16 ADCs Converting at 12-Bit, 80 MSPS or 10-Bit, 100 MSPS:
- Each ADC Converts Two Sets of Inputs at Half Rate
- 12-Bit Mode: 72-dBFS SNR
- 10-Bit Mode: 61-dBFS SNR
- TGC Mode Power w/o digital I/Q Demodulator:
- Lowest Power of 18.5 mW/Ch in Low Power Mode, 4 nV/rtHz, 10-Bit, 20 MSPS, LVDS (2x rate)
- 27.8 mW/Ch at 3 nV/rtHz in Low Noise Mode at 12-Bit, 40 MSPS
- 24.4 mW/Ch at 4 nV/rtHz in Low Power Mode at 12-Bit, 40 MSPS
- Excellent Device-to-Device Gain Matching:
- Harmonic Distortion: –55 dBc level
- Fast and Consistent Overload Recovery
- Continuous Wave (CW) Path With:
- Low Close-In Phase Noise of –148 dBc/Hz at 1-kHz Frequency Offset off 5-MHz Carrier
- Power Consumption w/o Signal: 10 mW/Ch
- Phase Resolution: λ/16
- 12-dB Suppression on Third and Fifth Harmonics
- Digital I/Q demodulator:
- Decimation Filter M = 1 to 63
- Data Throughput Reduction After Decimation
- On-Chip RAM with 32 Preset Profiles
- LVDS Interface with a Speed Up to 1-Gbps
- Small Package: 15-mm × 15-mm NFBGA-289
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