0
ACTIVE
Sample rate (max) (Msps) |
800 |
Resolution (Bits) |
12 |
Number of input channels |
2 |
Interface type |
DDR LVDS |
Analog input BW (MHz) |
1200 |
Features |
High Performance |
Rating |
Catalog |
Peak-to-peak input voltage range (V) |
1 |
Power consumption (typ) (mW) |
2100 |
Architecture |
Pipeline |
SNR (dB) |
61.8 |
ENOB (Bits) |
9.8 |
SFDR (dB) |
74 |
Operating temperature range (°C) |
-40 to 85 |
Input buffer |
No |
NFBGA (ZAY)-196-144 mm² 12 x 12
The ADS5402 is a high linearity dual channel 12-bit, 800 Msps analog-to-digital converter (ADC) easing front end filter design for wide bandwidth receivers. The analog input buffer isolates the internal switching of the on-chip track-and-hold from disturbing the signal source as well as providing a high-impedance input. Optionally the output data can be decimated by two. Designed for high SFDR, the ADC has low-noise performance and very good spurious-free dynamic range over a large input-frequency range. The device is available in a 196-pin BGA package and is specified over the full industrial temperature range (–40°C to 85°C).
WELL LINK CHIPS GROUP CO.,LIMITED FLAT/RM 1802 BEVERLY HOUSE 93-107 LOCKHART ROAD WANCHAI HK
