0
ACTIVE
Sample rate (max) (Msps) |
100 |
Resolution (Bits) |
10, 14 |
Number of input channels |
8, 16, 32 |
Interface type |
JESD204B, Serial LVDS |
Analog input BW (MHz) |
70 |
Features |
Low Power |
Rating |
Catalog |
Peak-to-peak input voltage range (V) |
2 |
Power consumption (typ) (mW) |
656 |
Architecture |
SAR |
SNR (dB) |
73.5 |
ENOB (Bits) |
10, 12, 14 |
SFDR (dB) |
91.8 |
Operating temperature range (°C) |
0 to 70 |
Input buffer |
No |
NFBGA (ZZE)-198-135 mm² 9 x 15
The ADS52J91 is a low-power, high-performance, 16-channel, analog-to-digital converter (ADC). The conversion rate of each ADC goes up to a maximum of 125 MSPS in 10-bit mode. The maximum conversion rate reduces when the ADC resolution is set to a higher value.
The device can be configured to accept 8, 16, or 32 inputs. In 32-input mode, each ADC alternately samples and converts two different inputs each at an effective sampling rate that is half of the ADC conversion rate. In 8-bit input mode, two ADCs convert the same input in an interleaved manner, resulting in an effective sampling rate that is twice the ADC conversion rate. The ADC is designed to scale its power with the conversion rate.
The ADC outputs are serialized and output through a low-voltage differential signaling (LVDS) interface along with a frame clock and a high-speed bit clock.
The device also has an optional JESD204B interface while operating in the 16-input and 32-input modes. This interface runs up to 5 Gbps
The device is available in a 9-mm × 15-mm, 0.8-mm pitch, NFBGA-198 package
WELL LINK CHIPS GROUP CO.,LIMITED FLAT/RM 1802 BEVERLY HOUSE 93-107 LOCKHART ROAD WANCHAI HK
