0
ADS1288
  • ADS1288
  • ADS1288

ADS1288

ACTIVE

Low-power, 32-bit two-channel delta-sigma ADC for seismic and geospace exploration

Texas Instruments ADS1288 Product Info

1 April 2026 1

Parameters

Resolution (Bits)

32

Sample rate (max) (ksps)

2

Number of input channels

2

Interface type

SPI

Architecture

Delta-Sigma

Input type

Differential

Multichannel configuration

Multiplexed

Rating

Catalog

Reference mode

External

Input voltage range (max) (V)

2.5

Input voltage range (min) (V)

-2.5

Features

GPIO, PGA

Operating temperature range (°C)

-40 to 85

Power consumption (typ) (mW)

5

Analog supply voltage (min) (V)

3

Analog supply voltage (max) (V)

5.5

SNR (dB)

121

Digital supply (min) (V)

1.65

Digital supply (max) (V)

3.6

Package

VQFN (RHB)-32-25 mm² 5 x 5

Features

  • Power consumption:
    • PGA operation: 5mW (typical)
    • Buffer operation: 3mW (typical)
  • Dynamic range:
    • PGA gain: 1, 500SPS (122dB, typical)
    • Buffer operation: 500SPS (122dB, typical)
  • THD: < –120dB (typical)
  • CMRR: 120dB (typical)
  • Flexible digital filter:
    • Selectable sinc + FIR + IIR
    • Linear or minimum phase
    • High-pass filter
  • Data rates: 125SPS to 2000SPS
  • PGA gains: 1 to 64
  • SYNC input
  • Clock error compensation
  • Two-channel multiplexer
  • Offset and gain calibration
  • General-purpose digital I/Os
  • Analog supply operation: 5V, 3.3V, or ±2.5V
  • Power consumption:
    • PGA operation: 5mW (typical)
    • Buffer operation: 3mW (typical)
  • Dynamic range:
    • PGA gain: 1, 500SPS (122dB, typical)
    • Buffer operation: 500SPS (122dB, typical)
  • THD: < –120dB (typical)
  • CMRR: 120dB (typical)
  • Flexible digital filter:
    • Selectable sinc + FIR + IIR
    • Linear or minimum phase
    • High-pass filter
  • Data rates: 125SPS to 2000SPS
  • PGA gains: 1 to 64
  • SYNC input
  • Clock error compensation
  • Two-channel multiplexer
  • Offset and gain calibration
  • General-purpose digital I/Os
  • Analog supply operation: 5V, 3.3V, or ±2.5V

Description

The ADS1288 is a 32-bit, low-power, analog-to-digital converter (ADC), with a programmable gain amplifier (PGA) and a finite impulse response (FIR) filter. The ADC is designed for the demanding requirements of seismology equipment requiring low power consumption to extend battery run time.

The low-noise PGA extends the ADC dynamic range through gains 1 to 64. The PGA allows direct connection to geophones and transformer-coupled hydrophones without the need of an external amplifier. The optional unity-gain buffer reduces power consumption.

The ADC incorporates a high-resolution, delta-sigma (ΔΣ) modulator and a FIR filter with programmable phase response. The high-pass filter removes dc and low-frequency content from the signal. Clock frequency error is compensated by the sample rate converter with up to 7ppb frequency accuracy.

The ADC supports 3.3V operation to minimize device power consumption. Power consumption is 3mW (typical) in buffer mode operation and 5mW (typical) in PGA mode operation.

The ADC is available in a compact 5mm × 5mm VQFN package and is fully specified over the –40°C to +85°C ambient temperature range.

The ADS1288 is a 32-bit, low-power, analog-to-digital converter (ADC), with a programmable gain amplifier (PGA) and a finite impulse response (FIR) filter. The ADC is designed for the demanding requirements of seismology equipment requiring low power consumption to extend battery run time.

The low-noise PGA extends the ADC dynamic range through gains 1 to 64. The PGA allows direct connection to geophones and transformer-coupled hydrophones without the need of an external amplifier. The optional unity-gain buffer reduces power consumption.

The ADC incorporates a high-resolution, delta-sigma (ΔΣ) modulator and a FIR filter with programmable phase response. The high-pass filter removes dc and low-frequency content from the signal. Clock frequency error is compensated by the sample rate converter with up to 7ppb frequency accuracy.

The ADC supports 3.3V operation to minimize device power consumption. Power consumption is 3mW (typical) in buffer mode operation and 5mW (typical) in PGA mode operation.

The ADC is available in a compact 5mm × 5mm VQFN package and is fully specified over the –40°C to +85°C ambient temperature range.

Subscribe to Welllinkchips !
Your Name
* Email
Submit a request