0
ACTIVE
Sample rate (max) (Msps) |
80 |
Resolution (Bits) |
12 |
Number of input channels |
2 |
Interface type |
Serial LVDS |
Analog input BW (MHz) |
1000 |
Features |
Low Power |
Rating |
Catalog |
Peak-to-peak input voltage range (V) |
2 |
Power consumption (typ) (mW) |
800 |
Architecture |
Pipeline |
SNR (dB) |
71 |
ENOB (Bits) |
11.5 |
SFDR (dB) |
88 |
Operating temperature range (°C) |
-40 to 85 |
Input buffer |
No |
WQFN (NKA)-60-81 mm² 9 x 9
All trademarks are the property of their respective owners.
The ADC12DS080 is a high-performance CMOS analog-to-digital converter capable of converting two analog input signals into 12-bit digital words at rates up to 80 Mega Samples Per Second (MSPS). The digital outputs are serialized and provided on differential LVDS signal pairs. This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize power consumption and the external component count, while providing excellent dynamic performance. The ADC12DS080 may be operated from a single +3.0V or 3.3V power supply. A power-down feature reduces the power consumption to very low levels while still allowing fast wake-up time to full operation. The differential inputs accept a 2V full scale differential input swing. A stable 1.2V internal voltage reference is provided, or the ADC12DS080 can be operated with an external 1.2V reference. The selectable duty cycle stabilizer maintains performance over a wide range of clock duty cycles. A serial interface allows access to the internal registers for full control of the ADC12DS080's functionality. The ADC12DS080 is available in a 60-lead WQFN package and operates over the industrial temperature range of −40°C to +85°C