50MHz crystal or CMOS input

Generates PCIe 1, 2, 3, 4, 5, 6, 7 compliant clocks

Spread-spectrum clocks (SSC) and regular clocks at the same time (configs 5-8)

Up to 6 output clocks with 8 default configurations selected by hardware pins at reset: (Configs 0-3 no SSC, Configs4-7 SSC for OC3-6)
• Config0/4: OC1 100MHz HCSL, OC2_P 25MHz LVCMOS, OC3/4/5 unused, OC6 100MHz HCSL
• Config1/5: OC1 100MHz HCSL, OC2_P 25MHz LVCMOS, OC3/4/5/6 100MHz HCSL
• Config2/6: OC1 100MHz HCSL, OC2_P 75MHz LVCMOS, OC3/4/5/6 100MHz HCSL
• Config3/7: OC1/2 100MHz HCSL, OC3/4/5/6 100MHz HCSL

Per-output control via SPI or I2C interface

Precise output alignment circuitry and per-output phase adjustment

Per-output enable/disable and glitch-less start/stop (stop high or low)

Spread-spectrum enable/disable for DIV2

Core supply voltage options: 2.5V only, 3.3V only, 1.8V+2.5V or 1.8V+3.3V

Space-saving 8x8mm QFN56 (0.5mm pitch)

The ZL30282 is a high-performance PCIe Gen 1-7 clock generator. From a 50MHz crystal or CMOS input these devices generate 100 MHZ in four pre-programmed output configurations immediately on power-up to 6

differential outputs. The device has output jitter of 28fs typ RMS for PCIe 7.0 common Refclk mode.