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S80KS5122GABHI020
  • S80KS5122GABHI020

S80KS5122GABHI020

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S80KS5122GABHI020 is a 512 Mb HYPERRAM™ self-refresh DRAM with a 1.8 V HYPERBUS™ interface. It supports up to 200 MHz DDR transfers for up to 400 MBps throughput and 35 ns maximum access time. Power is 1.7 V to 2.0 V, with hybrid sleep and deep power-down (30 µA at 105°C). It comes in a 24-ball FBGA (6 × 8 × 1.0 mm) and supports linear or wrapped bursts (16 to 128 bytes), plus partial-array refresh.

Infineon Technologies S80KS5122GABHI020 Product Info

16 April 2026 0

Parameters

Density

512 MBit

Family

KS-2

Initial Access Time

35 ns

Interface Bandwidth

400 MByte/s

Interface Frequency (SDR/DDR) (MHz)

- / 200

Interfaces

HYPERBUS

Lead Ball Finish

Sn/Ag/Cu

Operating Temperature range

-40 °C to 85 °C

Operating Voltage range

1.7 V to 2 V

Operating Voltage

1.8 V

Peak Reflow Temp

260 °C

Planned to be available until at least

See roadmap

Qualification

Industrial

Technology

HYPERRAM

Apps

High-performance cockpit controller

Features

  • HyperBus interface
  • 1.7 V to 2.0 V VCC supply
  • Single or differential clock input
  • 8-bit DDR bus with RWDS strobe
  • 200 MHz maximum clock rate
  • Up to 400 MBps data throughput
  • 35 ns maximum access time tACC
  • Burst: linear or wrapped
  • Wrap bursts: 16/32/64/128 bytes
  • Interface standby ignores I/O pins
  • Active clock stop after tACC+30 ns
  • Hybrid sleep via CR1[5], data kept

Description

  • 400 MBps supports fast buffering
  • DDR boosts bandwidth per pin
  • 1.8 V I/O matches low-voltage SoCs
  • RWDS strobe eases timing closure
  • Linear burst fits streaming reads
  • Wrap bursts match cache line fills
  • Standby reduces idle power draw
  • Clock stop saves power on stalls
  • Hybrid sleep keeps RAM contents
  • HS entry in 3 us reduces wake cost
  • HS exit in 100 us improves response
  • Deep power down cuts leakage

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