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S25FS512SDSMFV013
  • S25FS512SDSMFV013

S25FS512SDSMFV013

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The S25FS512SDSMFV013 is a 512 Mb (64 MB) automotive-grade SPI NOR Flash built on 65-nm MIRRORBIT™ technology with Eclipse architecture for fast program and erase. It supports SPI Multi-I/O, including single, dual, and quad data paths, and operates at 1.7 V to 2.0 V. DDR Quad I/O read rates reach 80 MB/s, with a 512-byte page buffer. Qualified to AEC-Q100 Grade 1 (-40°C to +125°C), it offers advanced sector protection, 100,000 program-erase cycles, and 20-year data retention.

Infineon Technologies S25FS512SDSMFV013 Product Info

16 April 2026 0

Parameters

Density

512 MBit

Family

FS-S

Interface Bandwidth

80 MByte/s

Interface Frequency (SDR/DDR) (MHz)

133 / 80

Interfaces

Quad SPI

Lead Ball Finish

Matte Tin Plating

Operating Temperature range

-40 °C to 105 °C

Operating Voltage range

1.7 V to 2 V

Operating Voltage

1.8 V

Peak Reflow Temp

260 °C

Planned to be available until at least

2035

Qualification

Industrial

Features

  • SPI with multi-I/O support
  • DDR and SDR clocking options
  • 24- or 32-bit addressing
  • Compatible with S25FL SPI families
  • Multiple read modes: Normal, Fast, Dual
  • Burst wrap and XIP support
  • 256/512-byte page programming buffer
  • Program and erase suspend/resume
  • Internal ECC with single bit correction
  • Hybrid and uniform sector erase options
  • 100,000 program-erase cycles min
  • 20 year data retention min

Description

  • Flexible interface for diverse host
  • High-speed data transfer and boot performance
  • Supports large address spaces for modern
  • Easy migration from legacy SPI designs
  • Optimized for fast and efficient data access
  • Enables execute-in-place (XIP) applications
  • Efficient programming for fast updates
  • Minimized downtime during program/erase
  • Enhanced data reliability and integrity
  • Flexible memory management for varied needs
  • Long device lifetime for demanding use
  • Reliable data storage for mission-critical

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