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S25FS256SDSBHI203
  • S25FS256SDSBHI203

S25FS256SDSBHI203

Active and preferred

The S25FS256SDSBHI203 is a 256 Mbit (32 MB) SPI NOR Flash memory using 65 nm MIRRORBIT™ technology and Eclipse architecture for fast program and erase. It supports single, dual, and quad SPI I/O, with up to 133 MHz SDR and 80 MHz DDR operation, enabling read rates up to 80 MBps. Operating from 1.7 V to 2.0 V, it meets AEC-Q100 Grade 1 for automotive use up to 125°C.

Infineon Technologies S25FS256SDSBHI203 Product Info

16 April 2026 0

Parameters

Density

256 MBit

Family

FS-S

Interface Bandwidth

80 MByte/s

Interface Frequency (SDR/DDR) (MHz)

133 / 80

Interfaces

Quad SPI

Lead Ball Finish

Sn/Ag/Cu

Operating Temperature range

-40 °C to 85 °C

Operating Voltage range

1.7 V to 2 V

Operating Voltage

1.8 V

Peak Reflow Temp

260 °C

Planned to be available until at least

2035

Qualification

Industrial

Features

  • Serial peripheral interface (SPI)
  • Double data rate (DDR) option
  • 24- or 32-bit address options
  • Multi I/O command support
  • Normal, Fast, Dual, Quad, DDR Quad I/O reads
  • Burst Wrap, Continuous (XIP), QPI modes
  • 256- or 512-byte page programming buffer
  • Automatic ECC, single-bit error correction
  • Hybrid and uniform sector erase options
  • 100,000 program-erase cycles minimum
  • 20 year data retention minimum
  • 1.7 V to 2.0 V supply voltage

Description

  • Flexible SPI supports many host controllers
  • DDR and Quad I/O enable high data rates
  • 32-bit addressing supports large designs
  • Multi I/O boosts read/write performance
  • Multiple read modes fit varied applications
  • XIP/QPI enable execute-in-place operation
  • Large page buffer speeds up programming
  • ECC improves data reliability
  • Flexible erase options ease partitioning
  • High endurance for long device lifetime
  • Long retention secures critical data
  • Low voltage reduces power consumption

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