LTC6955

LAST TIME BUY

Ultralow Jitter, 7.5GHz, 11 Output Fanout Buffer Family

Analog Devices LTC6955 Product Info

10 February 2026 7

Features

LTC6955: 11 Output Buffer
LTC6955-1: 10 Buffered Outputs and One ÷2 Output
Additive Output Jitter ~45fs RMS (ADC SNR Method)
Additive Output Jitter < 5fs RMS
- (Integration BW = 12kHz to 20MHz, f = 7.5GHz)

Eleven Ultralow Noise CML Outputs
Parallel Control for Multiple Output Configurations
–40°C to 125°C Operating Junction TemperatureRange

Part details & applications

The LTC6955 is a high performance, ultralow jitter, fanout clock buffer with eleven outputs. Its 4-pin parallel control port allows for multiple output setups, enabling any number between three and eleven outputs, as well as a complete shutdown. The parallel port also provides the ability to invert the output polarity of alternating outputs, simplifying designs with top and bottom board routing. Each of the CML outputs can run from DC to 7.5GHz. The LTC6955-1 replaces one output buffer with a divideby-2 frequency divider, allowing it to drive Analog Devices’ LTC6952 or LTC6953 to generate JESD204B subclass 1 SYSREF signals. These SYSREFs can pair with ultralow jitter device clocks from the LTC6955-1, which can run at frequencies up to 7.5GHz.

Applications

High Performance Data Converter Clocking
SONET, Fibre Channel, GigE Clock Distribution
Low Skew and Jitter Clock and Data Fanout
Wireless and Wired Communications
Single-Ended to Differential Conversion

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