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ADGS5412
  • ADGS5412
  • ADGS5412

ADGS5412

RECOMMENDED FOR NEW DESIGNS

SPI Interface, 4× SPST Switches, 9.8 Ω RON, ±20 V/+36 V, Mux Configurable

Analog Devices ADGS5412 Product Info

10 February 2026 6

Features

  • SPI interface with error detection
    • Includes CRC, invalid read/write address, and SCLK count error detection
    • Supports burst mode and daisy-chain mode
    • Industry standard SPI Mode 0 and Mode 3 interface compatible
  • Guaranteed break-before-make switching allowing external wiring of switches to deliver multiplexer configurations
  • VSS to VDD analog signal range
    • Fully specified at ±15 V, ±20 V, +12 V, and +36 V
    • ±9 V to ±22 V dual-supply operation
    • 9 V to 40 V single-supply operation
  • Latch-up proof analog switch pins
  • 8 kV HBM ESD rating
  • Low on resistance (<10 Ω)
  • 1.8 V logic compatibility with 2.7 V ≤ VL ≤ 3.3 V

Part details & applications

The ADGS5412 contains four independent single-pole/single- throw (SPST) switches. A serial peripheral interface (SPI) controls the switches. The SPI interface has robust error detection features, including cyclic redundancy check (CRC) error detection, invalid read/write address detection, and serial clock (SCLK) count error detection.

It is possible to daisy-chain multiple ADGS5412 devices together, which enables the configuration of multiple devices with a minimal amount of digital lines. The ADGS5412 can also operate in burst mode to decrease the time between SPI commands.

Each switch conducts equally well in both directions when on, and each switch has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked.

The on-resistance profile is very flat over the full analog input range, which ensures good linearity and low distortion when switching audio signals. The ADGS5412 exhibits break-before- make switching action, allowing use of the device in multiplexer applications with external wiring.

PRODUCT HIGHLIGHTS

  1. SPI interface removes the need for parallel conversion and logic traces and reduces general-purpose input/output (GPIO) channel count.
  2. Daisy-chain mode removes additional logic traces when multiple devices are used.
  3. CRC, invalid read/write address, and SCLK count error detection ensure a robust digital interface.
  4. CRC error detection capabilities allow for the use of the ADGS5412 in safety critical systems.
  5. Guaranteed break-before-make switching allows the use of the ADGS5412 in multiplexer configurations with external wiring.

Trench isolation analog switch section guards against latch-up. A dielectric trench separates the positive (P) and negative (N) channel transistors thereby preventing latch-up even under severe

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