AD9460

PRODUCTION

16-Bit, 80 MSPS/105 MSPS ADC

Analog Devices AD9460 Product Info

10 February 2026 5

Features

105 MSPS guaranteed sampling rate (AD9460-105)
79.4 dBFS SNR/91 dBc SFDR with 10 MHz input
(3.4 V p-p input, 80 MSPS)
78.3 dBFS SNR/ with 170 MHz input
(4.0 V_p-p input, 80 MSPS)
77.8 dBFS SNR/87 dBc SFDR with 170 MHz input
(3.4 V_p-p input, 80 MSPS)
77.2 dBFS SNR/84 dBc SFDR with 170 MHz input
(3.4 V_p-p input, 105 MSPS)
90 dBFS two-tone SFDR with 139 MHz/140 MHz input (3.4 V_p-p input, 105 MSPS)

60 fsec rms jitter
Excellent linearity
DNL = ±0.5 LSB typical
INL = ±3.0 LSB typical
2.0 V p-p to 4.0 V p-p differential full-scale input
Buffered analog inputs
LVDS outputs (ANSI-644 compatible) or CMOS outputs
Data format select (offset binary or twos complement)

Part details & applications

The AD9460 is a 16-bit, monolithic, sampling, analog-to-digital converter (ADC) with an on-chip track-and-hold circuit. It is optimized for performance, small size, and ease of use. The AD9460 operates up to 105 MSPS, providing a superior signal-to-noise ratio (SNR) for instrumentation, medical imaging, and radar receivers using baseband (<100 MHz) and IF frequencies.

The ADC requires 3.3 V and 5.0 V power supplies and a low voltage differential input clock for full performance operation. No external reference or driver components are required for many applications. Data outputs are CMOS or LVDS compatible (ANSI-644 compatible) and include the means to reduce the overall current needed for short trace distances.

Optional features allow users to implement various selectable operating conditions, including input range, data format select, and output data mode.

The AD9460 is available in a Pb-free, 100-lead, surface-mount, plastic package (TQFP_EP) specified over the industrial temperature range of −40°C to +85°C.

PRODUCTS HIGHLIGHTS

True 16-bit linearity.
High performance: outstanding SNR performance for baseband IFs in data acquisition, instrumentation, magnetic resonance imaging, and radar receivers.
Ease of use: on-chip reference and high input impedance, track-and-hold with adjustable analog input range, and an output clock simplifies data capture.
Packaged in a Pb-free, 100-lead TQFP/EP.
Clock duty cycle stabilizer (DCS) maintains overall ADC performance over a wide range of clock pulse widths. Out-of-range (OR) outputs indicate when the signal is beyond the selected input range.

APPLICATIONS

MRI receivers
Multicarrier, multimode, cellular receivers
Antenna array positioning
Power amplifier linearization

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