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AD9261
  • AD9261
  • AD9261

AD9261

NOT RECOMMENDED FOR NEW DESIGNS

16-Bit, 10 MHz Bandwidth, 30 MSPS to 160 MSPS Continuous Time Sigma-Delta ADC

Analog Devices AD9261 Product Info

10 February 2026 7

Features

  • SNR: 83 dB (85 dBFS) to 10 MHz input
  • SFDR: 87 dBc to 10 MHz input
  • Noise figure: 15 dB
  • Input impedance: 1 kΩ
  • Power: 340 mW
  • 1.8 V analog supply operation
  • 1.8 V to 3.3 V output supply
  • Selectable bandwidth 2.5 MHz/5 MHz/10 MHz
  • Output data rate: 30 MSPS to 160 MSPS
  • Integrated decimation filters
  • Integrated sample rate converter
  • On-chip PLL clock multiplier
  • On-chip voltage reference
  • Offset binary, Gray code, or twos complement data format
  • Serial control interface (SPI)

Part details & applications

The AD9261 is a 16-bit analog-to-digital converter (ADC) based on a continuous time sigma-delta (Σ-Δ) architecture that achieves 86 dB of dynamic range over a 10 MHz input bandwidth. The integrated features and characteristics unique to the continuous time Σ-Δ architecture significantly simplify its use and minimize the need for external components.

The AD9261 has a resistive input impedance that significantly relaxes the requirements of the driver amplifier. In addition, a 32× oversampled 5th-order continuous time loop filter significantly attenuates out of band signals and aliases, reducing the need for external filters at the input.

An external clock input or the integrated integer-N PLL provides the 640 MHz internal clock needed for the oversampled continuous time Σ-Δ modulator. On-chip decimation filters and sample rate converters reduce the modulator data rate from 640 MSPS to a user-defined output data rate between 30 MSPS to 160 MSPS, enabling a more efficient and direct interface.

The digital output data is presented in offset binary, Gray code, or twos complement format. A data clock output (DCO) is provided to ensure proper timing with the receiving logic.

The AD9261 operates on a 1.8 V analog supply and a 1.8 V to 3.3 V digital supply, consuming 375 mW. The AD9261 is available in a 48-lead LFCSP and is specified over the industrial temperature range (−40°C to +85°C).

Product Highlights

  • Continuous time Σ-Δ architecture efficiently achieves high dynamic range and wide bandwidth.
  • Passive input structure reduces or eliminates the requirements for a driver amplifier.
  • An oversampling ratio of 32× and high order loop filter provide excellent alias rejection reducing or eliminating the need for antialiasing filters.
  • An integrated decimation filter, sample rate converter, PLL clock

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