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Technology family |
LVC |
Supply voltage (min) (V) |
1.65 |
Supply voltage (max) (V) |
5.5 |
Number of channels |
1 |
Inputs per channel |
2 |
IOL (max) (mA) |
32 |
IOH (max) (mA) |
-32 |
Input type |
Schmitt-Trigger |
Output type |
Push-Pull |
Features |
Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) |
Data rate (max) (Mbps) |
100 |
Rating |
Catalog |
Operating temperature range (°C) |
-40 to 125 |
SOT-23 (DBV)-5-8.12 mm² 2.9 x 2.8
The SN74LVC1G132 device contains one 2-input NAND gate with Schmitt-trigger inputs designed for 1.65-V to 5.5-V VCC operation and performs the Boolean function Y = A × B or Y = A + B in positive logic.
Because of Schmitt action, this device has different input threshold levels for positive-going (VT+) and negative-going (VT–) signals.
This device can be triggered from the slowest of input ramps and still give clean jitter-free output signals.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
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