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SN74LVC126A
  • SN74LVC126A
  • SN74LVC126A
  • SN74LVC126A
  • SN74LVC126A
  • SN74LVC126A
  • SN74LVC126A
  • SN74LVC126A

SN74LVC126A

ACTIVE

Four-channel, 1.65V to 3.6V buffers with three-state outputs

Texas Instruments SN74LVC126A Product Info

1 April 2026 0

Parameters

Technology family

LVC

Supply voltage (min) (V)

1.65

Supply voltage (max) (V)

3.6

Number of channels

4

IOL (max) (mA)

24

Supply current (max) (µA)

40

IOH (max) (mA)

-24

Input type

Standard CMOS

Output type

3-State

Features

Balanced outputs, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 125

Package

SOIC (D)-14-51.9 mm² 8.65 x 6

Features

  • Operates from 1.65V to 3.6V
  • Specified from –40°C to +125°C
  • Inputs accept voltages up to 5.5V
  • Maximum tpd of 4.7ns at 3.3V
  • Typical VOLP (output ground bounce), <0.8V at VCC = 3.3V, TA = 25°C
  • Typical VOHV (output VOH undershoot), >2V at VCC = 3.3V, TA = 25°C
  • Latch-up performance exceeds 250mA per JESD 17
  • Operates from 1.65V to 3.6V
  • Specified from –40°C to +125°C
  • Inputs accept voltages up to 5.5V
  • Maximum tpd of 4.7ns at 3.3V
  • Typical VOLP (output ground bounce), <0.8V at VCC = 3.3V, TA = 25°C
  • Typical VOHV (output VOH undershoot), >2V at VCC = 3.3V, TA = 25°C
  • Latch-up performance exceeds 250mA per JESD 17

Description

The SN74LVC126A device is a quadruple bus buffer gate designed for 1.65V to 3.6V VCC operation.

The SN74LVC126A device features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low.

To ensure the high-impedance state during power up or power down, OE must be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of this device as a translator in a mixed 3.3V and 5V system environment.

The SN74LVC126A device is a quadruple bus buffer gate designed for 1.65V to 3.6V VCC operation.

The SN74LVC126A device features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low.

To ensure the high-impedance state during power up or power down, OE must be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of this device as a translator in a mixed 3.3V and 5V system environment.

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