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SN74LV8T9541
  • SN74LV8T9541
  • SN74LV8T9541
  • SN74LV8T9541
  • SN74LV8T9541
  • SN74LV8T9541

SN74LV8T9541

ACTIVE

Octal buffer with 3-state outputs, schmitt-trigger input, dual enable and level-shifting

Texas Instruments SN74LV8T9541 Product Info

1 April 2026 0

Parameters

Bits (#)

8

Data rate (max) (Mbps)

150

Topology

Push-Pull

Direction control (typ)

Fixed-direction

Vin (min) (V)

1.65

Vin (max) (V)

5.5

Vout (min) (V)

1.65

Vout (max) (V)

5.5

Applications

GPIO, SPI

Features

Output enable, Single supply

Prop delay (ns)

13.7

Technology family

LVxT

Supply current (max) (mA)

1.5

Rating

Catalog

Operating temperature range (°C)

-40 to 125

Package

TSSOP (PW)-20-41.6 mm² 6.5 x 6.4

Features

  • Wide operating range of 1.65V to 5.5V
  • 5.5V tolerant input pins
  • Single-supply voltage translator (refer to LVxT Enhanced Input Voltage):
    • Up translation:
      • 1.2V to 1.8V
      • 1.5V to 2.5V
      • 1.8V to 3.3V
      • 3.3V to 5.0V
    • Down translation:

      • 5.0V, 3.3V, 2.5V to 1.8V
      • 5.0V, 3.3V to 2.5V
      • 5.0V to 3.3V
  • Up to 150Mbps with 5V or 3.3V VCC
  • Supports standard function pinout
  • Latch-up performance exceeds 250mAper JESD 17
  • Wide operating range of 1.65V to 5.5V
  • 5.5V tolerant input pins
  • Single-supply voltage translator (refer to LVxT Enhanced Input Voltage):
    • Up translation:
      • 1.2V to 1.8V
      • 1.5V to 2.5V
      • 1.8V to 3.3V
      • 3.3V to 5.0V
    • Down translation:

      • 5.0V, 3.3V, 2.5V to 1.8V
      • 5.0V, 3.3V to 2.5V
      • 5.0V to 3.3V
  • Up to 150Mbps with 5V or 3.3V VCC
  • Supports standard function pinout
  • Latch-up performance exceeds 250mAper JESD 17

Description

The SN74LV8T9541 is an octal buffer with 3-state outputs and Schmitt-trigger inputs.

The input is designed with a reduced threshold circuit to support up translation when the supply voltage is larger than the input voltage. Additionally, the 5V tolerant input pins enable down translation when the input voltage is larger than the supply voltage. The output level is always referenced to the supply voltage (VCC) and supports 1.8V, 2.5V, 3.3V, and 5V CMOS levels.

The SN74LV8T9541 is an octal buffer with 3-state outputs and Schmitt-trigger inputs.

The input is designed with a reduced threshold circuit to support up translation when the supply voltage is larger than the input voltage. Additionally, the 5V tolerant input pins enable down translation when the input voltage is larger than the supply voltage. The output level is always referenced to the supply voltage (VCC) and supports 1.8V, 2.5V, 3.3V, and 5V CMOS levels.

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