0
Technology family |
LVxT |
Number of channels |
8 |
IOH (max) (mA) |
-25 |
IOL (max) (mA) |
25 |
Features |
Over-voltage tolerant inputs |
Input type |
TTL/CMOS |
Output type |
CMOS |
Operating temperature range (°C) |
to |
TSSOP (PW)-20-41.6 mm² 6.5 x 6.4
Down translation:
The SN74LV8T573-EP devices are octal transparent D-type latches that feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
While the latch-enable (LE) input is high, the Q outputs respond to the data (D) inputs. When LE is low, the outputs are latched to retain the data that was set up.