0
ACTIVE
Bits (#) |
6 |
Data rate (max) (Mbps) |
6 |
Topology |
Push-Pull |
Direction control (typ) |
Fixed-direction |
Vin (min) (V) |
1.6 |
Vin (max) (V) |
5.5 |
Vout (min) (V) |
1.65 |
Vout (max) (V) |
5.5 |
Applications |
GPIO |
Features |
Over-voltage tolerant inputs, Single supply |
Prop delay (ns) |
12.5 |
Technology family |
LVxT |
Supply current (max) (mA) |
0.02 |
Rating |
HiRel Enhanced Product |
Operating temperature range (°C) |
-55 to 125 |
TSSOP (PW)-14-32 mm² 5 x 6.4
Single-supply voltage translator (refer to LVxT Enhanced Input Voltage):
Up translation:
1.2V to 1.8V
1.5V to 2.5V
1.8V to 3.3V
3.3V to 5.0V
Down translation:
The SN74LV6T14-EP device contains six independent Inverter with Schmitt-trigger inputs. Each gate performs the Boolean function Y = A in positive logic. The output level is referenced to the supply voltage (VCC) and supports 1.8-V, 2.5V, 3.3V, and 5V CMOS levels.
The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example, 1.2V input to 1.8V output or 1.8V input to 3.3V output). In addition, the 5V tolerant input pins enable down translation (for example, 3.3V to 2.5V output).
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