0
ACTIVE
Bits (#) |
1 |
Data rate (max) (Mbps) |
500 |
Topology |
Push-Pull |
Direction control (typ) |
Direction-controlled |
Vin (min) (V) |
0.65 |
Vin (max) (V) |
3.6 |
Vout (min) (V) |
0.65 |
Vout (max) (V) |
3.6 |
Applications |
GPIO |
Features |
Output enable, Partial power down (Ioff), Vcc isolation |
Prop delay (ns) |
5 |
Technology family |
AXC |
Supply current (max) (mA) |
0.016 |
Rating |
Automotive |
Operating temperature range (°C) |
-40 to 125 |
SOT-SC70 (DCK)-6-4.2 mm² 2 x 2.1
The SN74AXC1T45-Q1 is AEC-Q100 qualified single-bit non-inverting bus transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCA and VCCB supplies as low as 0.65V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65V to 3.6V. The B port is designed to track VCCB, which also accepts any supply voltage from 0.65V to 3.6V. Additionally, the SN74AXC1T45-Q1 is compatible with a single-supply system.
The DIR pin determines the direction of signal propagation. With the DIR pin configured HIGH, translation is from Port A to Port B. With DIR configured LOW, translation is from Port B to Port A. The DIR pin is referenced to VCCA, meaning that its logic-high and logic-low thresholds track with VCCA.
This device is fully specified for partial-power-down applications using the Ioff current. The Ioff protection circuitry is designed so that no excessive current is drawn from or to an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.
The VCC isolation feature is designed so that if either VCCA or VCCB is less than 100mV, both I/O ports enter a high-impedance state by disabling their outputs.
Glitch-free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance.
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