PDIP (N)-14-181.42 mm² 19.3 x 9.4

The Nx556 and Sx556 devices provide two independent timing circuits of the NA555, NE555, SA555, or SE555 type in each package. These circuits operate in an astable or monostable mode with external resistor-capacitor (RC) timing control. The basic timing provided by the RC time constant is controlled actively by modulating the bias of the control-voltage input.

Each timer has a trigger level equal to approximately one-third of the supply voltage and a threshold level equal to approximately two-thirds of the supply voltage. These levels can be altered by use of the control voltage pin (CONT). When the trigger input (TRIG) is less than the trigger level, the flip-flop is set and the output goes high. If TRIG is greater than the trigger level and the threshold input (THRES) is greater than the threshold level, the flip-flop is reset and the output is low. The reset input (RESET) overrides all other inputs and is used to initiate a new timing cycle. If RESET is low, the flip-flop is reset and the output is low. Whenever the output is low, a low-impedance path is provided between the discharge pin (DISCH) and the ground pin (GND). Tie all unused inputs to an appropriate logic level to prevent false triggering.