Product
0
LSF0101
  • LSF0101
  • LSF0101
  • LSF0101
  • LSF0101
  • LSF0101
  • LSF0101
  • LSF0101

LSF0101

ACTIVE

Single bi-directional multi-voltage level translator

Texas Instruments LSF0101 Product Info

1 April 2026 0

Parameters

Bits (#)

1

Data rate (max) (Mbps)

200

Topology

Open drain, Push-Pull

Vin (min) (V)

0.95

Vin (max) (V)

3.6

Vout (min) (V)

1.8

Vout (max) (V)

5

Applications

GPIO, I2C, MDIO, PMBus, SMBus

Features

Output enable

Prop delay (ns)

0.4

Technology family

LSF

Supply current (max) (mA)

0.0125

Rating

Catalog

Operating temperature range (°C)

-40 to 125

Package

USON (DRY)-6-1.45 mm² 1.45 x 1

Features

  • Provides bidirectional voltage translation with no direction pin
  • Supports up to 100-MHz up translation and greater than 100-MHz down translation at ≤ 30 pF capacitive load and up To 40-MHz up or down translation at 50 pF capacitive load
  • Allows bidirectional voltage-level translation between
    • 0.95 V ↔ 1.8/2.5/3.3/5 V
    • 1.2 V ↔ 1.8/2.5/3.3/5 V
    • 1.8 V ↔ 2.5/3.3/5 V
    • 2.5 V ↔ 3.3/5 V
    • 3.3 V ↔ 5 V
  • Low standby current
  • 5-V tolerance I/O port to support TTL
  • Low R ON provides less signal distortion
  • High-impedance I/O pins for EN = Low
  • Flow-through pinout for easy PCB trace routing
  • Latch-up performance >100 mA per JESD 17
  • –40°C to 125°C operating temperature range
  • Provides bidirectional voltage translation with no direction pin
  • Supports up to 100-MHz up translation and greater than 100-MHz down translation at ≤ 30 pF capacitive load and up To 40-MHz up or down translation at 50 pF capacitive load
  • Allows bidirectional voltage-level translation between
    • 0.95 V ↔ 1.8/2.5/3.3/5 V
    • 1.2 V ↔ 1.8/2.5/3.3/5 V
    • 1.8 V ↔ 2.5/3.3/5 V
    • 2.5 V ↔ 3.3/5 V
    • 3.3 V ↔ 5 V
  • Low standby current
  • 5-V tolerance I/O port to support TTL
  • Low R ON provides less signal distortion
  • High-impedance I/O pins for EN = Low
  • Flow-through pinout for easy PCB trace routing
  • Latch-up performance >100 mA per JESD 17
  • –40°C to 125°C operating temperature range

Description

The LSF family of devices supports bidirectional voltage translation without the need for DIR pin which minimizes system effort (for PMBus, I 2C, SMBus, and so forth). The LSF family of devices supports up to 100-MHz up translation and greater than 100-MHz down translation at ≤ 30 pF capacitive load and up to 40-MHz up or down translation at 50 pF capacitive load which allows the LSF family to support more consumer or telecom interfaces (MDIO or SDIO).

LSF family supports 5-V tolerance on I/O port which makes it compatible with TTL levels in industrial and telecom applications. The LSF family is able to set up different voltage translation levels which makes it very flexible.

The LSF family of devices supports bidirectional voltage translation without the need for DIR pin which minimizes system effort (for PMBus, I 2C, SMBus, and so forth). The LSF family of devices supports up to 100-MHz up translation and greater than 100-MHz down translation at ≤ 30 pF capacitive load and up to 40-MHz up or down translation at 50 pF capacitive load which allows the LSF family to support more consumer or telecom interfaces (MDIO or SDIO).

LSF family supports 5-V tolerance on I/O port which makes it compatible with TTL levels in industrial and telecom applications. The LSF family is able to set up different voltage translation levels which makes it very flexible.

Subscribe to Welllinkchips !
Your Name
* Email
Popular Posts
Featured Parts More >
Submit a request
CONTACT US
Company address

WELL LINK CHIPS GROUP CO.,LIMITED FLAT/RM 1802 BEVERLY HOUSE 93-107 LOCKHART ROAD WANCHAI HK

Send Enquiry
SEND e-MAIL
Office hour from 9am to 6pm ,
Monday through Friday, UTC/GMT +8