- FMCW transceiver
- Integrated PLL, transmitter, receiver, Baseband, and ADC
- 60 to 64GHz coverage with 4GHz continuous bandwidth
- Four receive channels
- Three transmit channels
- Supports 6-bit phase shifter for TX Beam forming
- Ultra-accurate chirp engine based on fractional-N PLL
- TX power: 12dBm
- RX noise figure:
- Phase noise at 1MHz:
- Built-in calibration and self-test
- Arm Cortex-R4F-based radio control system
- Built-in firmware (ROM)
- Self-calibrating system across process and temperature
- Embedded self-monitoring with no host processor involvement on Functional Safety-Compliant devices
- C674x DSP for advanced signal processing (IWR6843 only)
- Hardware accelerator for FFT, filtering, and CFAR processing
- Memory compression
- Arm-R4F microcontroller for object detection, and interface control
- Supports autonomous mode (loading user application from QSPI flash memory)
- Internal memory with ECC
- IWR6843: 1.75MB, divided into MSS program RAM (512KB), MSS data RAM (192KB), DSP L1 RAM (64KB) and L2 RAM (256KB), and L3 radar data cube RAM (768KB)
- IWR6443: 1.4MB, divided into MSS program RAM (512KB), MSS data RAM (192KB), and L3 radar data cube RAM (768KB)
- Technical reference manual includes allowed size modifications
- Other interfaces available to user application
- Up to 6 ADC channels (low sample rate monitoring)
- Up to 2 SPI ports
- Up to 2 UARTs
- 1 CAN-FD interface
- I2C
- GPIOs
- 2 lane LVDS interface for raw ADC data and debug instrumentation
- Functional Safety-Compliant
- Developed for functional safety applications
- Documentation available to aid IEC 61508 functional safety system design up to SIL 3
- Hardware integrity up to SIL-2
- Safety-related certification
- IEC 61508 certified upto SIL 2 by TUV SUD
- Non-Functional safety variants also available
- Power management
- Built-in LDO network for enhanced PSRR
- I/Os support dual voltage 3.3V/1.8V
- Clock source
- 40.0MHz crystal with internal oscillator
- Supports external oscillator at 40MHz
- Supports externally driven clock (square/sine) at 40MHz
- Easy hardware design
- 0.65mm pitch, 161-pin 10.4mm × 10.4mm flip chip BGA package for easy assembly and low-cost PCB design
- Small solution size
- Operating conditions
- Junction temp range: –40°C to 105°C
- FMCW transceiver
- Integrated PLL, transmitter, receiver, Baseband, and ADC
- 60 to 64GHz coverage with 4GHz continuous bandwidth
- Four receive channels
- Three transmit channels
- Supports 6-bit phase shifter for TX Beam forming
- Ultra-accurate chirp engine based on fractional-N PLL
- TX power: 12dBm
- RX noise figure:
- Phase noise at 1MHz:
- Built-in calibration and self-test
- Arm Cortex-R4F-based radio control system
- Built-in firmware (ROM)
- Self-calibrating system across process and temperature
- Embedded self-monitoring with no host processor involvement on Functional Safety-Compliant devices
- C674x DSP for advanced signal processing (IWR6843 only)
- Hardware accelerator for FFT, filtering, and CFAR processing
- Memory compression
- Arm-R4F microcontroller for object detection, and interface control
- Supports autonomous mode (loading user application from QSPI flash memory)
- Internal memory with ECC
- IWR6843: 1.75MB, divided into MSS program RAM (512KB), MSS data RAM (192KB), DSP L1 RAM (64KB) and L2 RAM (256KB), and L3 radar data cube RAM (768KB)
- IWR6443: 1.4MB, divided into MSS program RAM (512KB), MSS data RAM (192KB), and L3 radar data cube RAM (768KB)
- Technical reference manual includes allowed size modifications
- Other interfaces available to user application
- Up to 6 ADC channels (low sample rate monitoring)
- Up to 2 SPI ports
- Up to 2 UARTs
- 1 CAN-FD interface
- I2C
- GPIOs
- 2 lane LVDS interface for raw ADC data and debug instrumentation
- Functional Safety-Compliant
- Developed for functional safety applications
- Documentation available to aid IEC 61508 functional safety system design up to SIL 3
- Hardware integrity up to SIL-2
- Safety-related certification
- IEC 61508 certified upto SIL 2 by TUV SUD
- Non-Functional safety variants also available
- Power management
- Built-in LDO network for enhanced PSRR
- I/Os support dual voltage 3.3V/1.8V
- Clock source
- 40.0MHz crystal with internal oscillator
- Supports external oscillator at 40MHz
- Supports externally driven clock (square/sine) at 40MHz
- Easy hardware design
- 0.65mm pitch, 161-pin 10.4mm × 10.4mm flip chip BGA package for easy assembly and low-cost PCB design
- Small solution size
- Operating conditions
- Junction temp range: –40°C to 105°C