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DS90UB933-Q1
  • DS90UB933-Q1

DS90UB933-Q1

ACTIVE

12-bit 100 MHz FPD-Link III Serializer for 1MP/60fps and 2MP/30fps Cameras

Texas Instruments DS90UB933-Q1 Product Info

1 April 2026 1

Parameters

Applications

Advanced Driver Assistance Systems (ADAS)

Input compatibility

LVCMOS

Function

Serializer

Output compatibility

FPD-Link III LVDS

Color depth (bpp)

12

Features

Low-EMI Point-to-Point Communication

Signal conditioning

Adaptive Equalizer

EMI reduction

LVDS

Diagnostics

BIST

Rating

Automotive

Operating temperature range (°C)

-40 to 105

Package

WQFN (RTV)-32-25 mm² 5 x 5

Features

  • AEC-Q100 qualified for automotive applications with the following results:
    • Device temperature grade 2: –40°C to +105°C ambient operating temperature
  • 37.5-MHz to 100-MHz input pixel clock support
  • Robust Power-Over-Coaxial (PoC) operation
  • Programmable data payload:
    • 10-Bit payload up to 100-MHz
    • 12-Bit payload up to 100-MHz
  • Continuous low latency bidirectional control interface channel with I2C support at 400-kHz
  • Embedded clock with DC-balanced coding to support AC-coupled interconnects
  • Capable of driving up to 15-m coaxial or Shielded Twisted-Pair (STP) cables
  • 4 Dedicated General-Purpose Input/Output (GPIO)
  • 1.8-V, 2.8-V or 3.3-V compatible parallel inputs on serializer
  • Single power supply at 1.8-V
  • ISO 10605 and IEC 61000-4-2 ESD compliant
  • AEC-Q100 qualified for automotive applications with the following results:
    • Device temperature grade 2: –40°C to +105°C ambient operating temperature
  • 37.5-MHz to 100-MHz input pixel clock support
  • Robust Power-Over-Coaxial (PoC) operation
  • Programmable data payload:
    • 10-Bit payload up to 100-MHz
    • 12-Bit payload up to 100-MHz
  • Continuous low latency bidirectional control interface channel with I2C support at 400-kHz
  • Embedded clock with DC-balanced coding to support AC-coupled interconnects
  • Capable of driving up to 15-m coaxial or Shielded Twisted-Pair (STP) cables
  • 4 Dedicated General-Purpose Input/Output (GPIO)
  • 1.8-V, 2.8-V or 3.3-V compatible parallel inputs on serializer
  • Single power supply at 1.8-V
  • ISO 10605 and IEC 61000-4-2 ESD compliant

Description

The DS90UB933-Q1 device offers an FPD-Link III interface with a high-speed forward channel and a bidirectional control channel for data transmission over a single coaxial cable or differential pair. The DS90UB933-Q1 device incorporates differential signaling on both the high-speed forward channel and bidirectional control channel data paths. The serializer/deserializer pair is targeted for connections between imagers and video processors in an electronic control unit (ECU). This device is ideally suited for driving video data requiring up to 12-bit pixel depth plus two synchronization signals along with bidirectional control channel bus.

Using TI’s embedded clock technology allows transparent full-duplex communication over a single differential pair, carrying asymmetrical-bidirectional control channel information. This single serial stream simplifies transferring a wide data bus over PCB traces and cable by eliminating the skew problems between parallel data and clock paths. This significantly saves system cost by narrowing data paths that in turn reduce PCB layers, cable width, and connector size and pins. Internal DC-balanced encoding/decoding is used to support AC-coupled interconnects.

The DS90UB933-Q1 device offers an FPD-Link III interface with a high-speed forward channel and a bidirectional control channel for data transmission over a single coaxial cable or differential pair. The DS90UB933-Q1 device incorporates differential signaling on both the high-speed forward channel and bidirectional control channel data paths. The serializer/deserializer pair is targeted for connections between imagers and video processors in an electronic control unit (ECU). This device is ideally suited for driving video data requiring up to 12-bit pixel depth plus two synchronization signals along with bidirectional control channel bus.

Using TI’s embedded clock technology allows transparent full-duplex communication over a single differential pair, carrying asymmetrical-bidirectional control channel information. This single serial stream simplifies transferring a wide data bus over PCB traces and cable by eliminating the skew problems between parallel data and clock paths. This significantly saves system cost by narrowing data paths that in turn reduce PCB layers, cable width, and connector size and pins. Internal DC-balanced encoding/decoding is used to support AC-coupled interconnects.

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