0
ACTIVE
Number of channels |
8 |
Technology family |
FCT |
Supply voltage (min) (V) |
4.75 |
Supply voltage (max) (V) |
5.25 |
Input type |
TTL, TTL-Compatible CMOS |
Output type |
CMOS, Push-Pull |
Clock frequency (max) (MHz) |
100 |
IOL (max) (mA) |
64 |
IOH (max) (mA) |
-32 |
Supply current (max) (µA) |
200 |
Features |
Partial power down (Ioff), Very high speed (tpd 5-10ns) |
Operating temperature range (°C) |
-40 to 85 |
Rating |
Catalog |
SOIC (DW)-20-131.84 mm² 12.8 x 10.3
The x92FCT273T devices consist of eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered-clock (CP) and master-reset (MR) inputs load and reset all flip-flops simultaneously. These devices are edge-triggered registers. The state of each D input (one setup time before the low-to-high clock transition) is transferred to the corresponding flip-flopx92s Q output. All outputs are forced low by a low logic level on the MR input.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
WELL LINK CHIPS GROUP CO.,LIMITED FLAT/RM 1802 BEVERLY HOUSE 93-107 LOCKHART ROAD WANCHAI HK
