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CD74HC564
  • CD74HC564
  • CD74HC564
  • CD74HC564

CD74HC564

ACTIVE

High Speed CMOS Logic Octal Positive-Edge-Triggered Inverting D-Type Flip-Flops with 3-State Outputs

Texas Instruments CD74HC564 Product Info

1 April 2026 1

Parameters

Number of channels

8

Technology family

HC

Supply voltage (min) (V)

2

Supply voltage (max) (V)

6

Input type

Standard CMOS

Output type

3-State

Clock frequency (max) (MHz)

24

IOL (max) (mA)

7.8

IOH (max) (mA)

-7.8

Supply current (max) (µA)

80

Features

Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode

Operating temperature range (°C)

-55 to 125

Rating

Catalog

Package

PDIP (N)-20-228.702 mm² 24.33 x 9.4

Features

  • Buffered inputs
  • Common three-state output-enable control
  • Three-state outputs
  • Bus line driving capability
  • Typical propagation delay = 13 ns at VCC = 5 V, CL = 15 pF, TA = 25℃ (clock to output)
  • Fanout (over temperature range)
    • Standard outputs: 10 LSTTL loads
    • Bus driver outputs: 15 LSTTL loads
  • Wide operating temperature range: –55℃ to 125℃
  • Balanced propagation delay and transition times
  • Significant power reduction compared to LSTTL Logic ICs
  • HC types
    • 2 V to 6 V operation
    • High noise immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5 V
  • HCT types
    • 4.5 V to 5.5 V operation
    • Direct LSTTL input logic compatibility, VIL = 0.8 V (max), VIH = 2 V (min)
    • CMOS input compatibility, II ≤ 1 µA at VOL, VOH
  • Buffered inputs
  • Common three-state output-enable control
  • Three-state outputs
  • Bus line driving capability
  • Typical propagation delay = 13 ns at VCC = 5 V, CL = 15 pF, TA = 25℃ (clock to output)
  • Fanout (over temperature range)
    • Standard outputs: 10 LSTTL loads
    • Bus driver outputs: 15 LSTTL loads
  • Wide operating temperature range: –55℃ to 125℃
  • Balanced propagation delay and transition times
  • Significant power reduction compared to LSTTL Logic ICs
  • HC types
    • 2 V to 6 V operation
    • High noise immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5 V
  • HCT types
    • 4.5 V to 5.5 V operation
    • Direct LSTTL input logic compatibility, VIL = 0.8 V (max), VIH = 2 V (min)
    • CMOS input compatibility, II ≤ 1 µA at VOL, VOH

Description

CD74HC564:High Speed CMOS Logic Octal Positive-Edge-Triggered Inverting D-Type Flip-Flops with 3-State Outputs.Package:PDIP (N)-20-228.702 mm² 24.33 x 9.4

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