- Device Cores
- Arm Cortex-M33 32-bit CPU up to 200MHz
- Floating Point Unit (FPU), Custom Datapath Extension (CDE), Memory Protection Unit (MPU) and Micro Trace Buffer (MTB)
- DSP Extension and 32-bit Trigonometric Math Unit (TMU) accelerates trigonometric calculations
- DMIPS=310 and Coremark=800
- 1x TinyEngineTM Neural-Network Processing Unit (NPU) optimized for time-series Edge AI enablement
- Memories
- Up to 512kB (2 banks of up to 256kB, 1kB sectors) of non-volatile flash memory
- 144-bit word with Error Correction Code
- Bank swap for dual-image firmware
- Up to 128kB of 0-wait state SRAM
- Hardware parity and 1kB instruction cache
- External Peripheral Interface (EPI) supporting SDRAM, ASRAM, or ASIC/FPGA external interfaces
- High-Performance Analog Peripherals
- 3x SAR Analog-to-digital Converters (ADCs)
- 6.67MSPS with 12-bit resolution
- Each ADC supports up to 32 channels
- Configurable 1.65V or 2.5V internal shared voltage reference (VREF)
- Support for external voltage reference (VREF)
- Hardware oversampling and undersampling modes, with accumulation, averaging and outlier rejection
- 4x Analog Comparator Sub-systems (CMPSS)
- 2x Comparators with Window Functionality
- 2x 10-bit effective DAC and 2x digital filters
- CMPSS[2:3] support buffered DACL_OUT to pin
- 3x Programmable Gain Amplifiers (PGA)
- Unity Gain Support
- Inverting and non-inverting gain mode support
- Gain options: 1, 2/-1, 4/-3, 8/-7, 16/-15, 32/-31, 64/-63
- 4:1 input mux supporting up to 12 channels
- Programmable output filtering
- Programmable analog connections between ADC, PGAs, CMPSS and DAC
- Optimized Low-Power Modes
- RUN: 49mA @ 200MHz
- STANDBY: 1.84mA with CPU execution resume and 32kB SRAM retention
- SHUTDOWN: <5µA with IO wake-up capability
- Flexible System Peripherals
- 12-channel Data Movement Architecture (DMA) controller
- Nested Vectored Interrupt Controller (NVIC)
- Up to 107 GPIO with Input/Output XBAR connectivity
- 8 GPIOs with Shutdown Wakeup Capability
- 1x Windowed Watchdog Timer (WWDT)
- Independent 32kHz clock with programmable divider
- 25-bit counter with configurable timer periods
- 2x general-purpose timers
- TIMG4 (32-bit), TIMG12 (16-bit)
- Pre-scaler, Compare/Capture, Shadow
- Up to 2x channels each
- Real-time Control Peripherals
- 5x Motor Control Pulse Width Modulation (MCPWM) modules
- 6 PWM channels per module with 16-bit time base
- 4 Start Of Conversion (SOCs) per module enable precise ADC sampling for single shunt or three shunt current sensing mode
- Support dead-band, trip event and time base synchronization
- 2x Enhanced Capture (eCAP) modules
- 32-bit timer for speed, elapsed time, period and duty cycle measurements
- 1x alternative PWM channel per module
- 3x Enhanced Quadrature Encoder Pulse (eQEP)
- Supports linear or rotary incremental encoder interface
- Edge capture unit for optimized speed measurement at low speed
- Device Crossbars (INPUTXBAR, OUTPUTXBAR, PWMXBAR)
- Flexibility to route signals from GPIO to other modules
-
For example, the INPUTXBAR is used to route signals from a GPIO to other modules such as ADC, CMPSS, MCPWM, eCAP, eQEP, and external interrupts
- Enhanced Serial Communication Interfaces
- Clock System
- Internal 4MHz/32MHz oscillator (SYSOSC)
- Internal 32kHz oscillator (LFOSC)
- System Phase-locked loop (SYSPLL) up to 200MHz
- External 4MHz to 25MHz crystal oscillator (XTAL)
- External 4MHz to 48MHz clock input (HFCLK)
- OS Support
- FreeRTOS, Zephyr, Baremetal
- Safety
- Enabling IEC61508 SIL-2 and SIL-3 systems
- Data Integrity and Encryption
- Secure Boot/FWU/Debug/JTAG Lock
- Secure Key Storage and Management
- Privileged/Non-Privileged resource partitioning
- Flash Write/Erase/Hide Protections
- Device Life cycle Management
- AES Encryption with 128- or 256-bit Key
- Unique Identification Number (UID)
- Internal Diagnostic Modules
- Cyclic Redundancy Checker (CRC-16, CRC-32)
- Integrated Temperature Sensor
- Integrated BOR/POR Supply Monitors
- Development Support
- JTAG (4-pin) and Serial Wire Debug (SWD) (2-pin)
- Micro Trace Buffer (MTB)
- Embedded Trace Macrocell (ETM) (TRACE_DATA[0:3])
- Supports Serial Trace and Parallel Trace
- Package Options
- 128-pin PDT Thin Quad Flat Package (TQFP) (0.4mm pitch)
- 100-pin PZ Low-profile Quad Flat Pack (LQFP) (0.5mm pitch)
- 80-pin PN Low-profile Quad Flat Pack (LQFP) (0.5mm pitch)
- 64-pin PM Low-profile Quad Flat Pack (LQFP) (0.5mm pitch)
- 48-pin PT Low-profile Quad Flat Pack (LQFP) (0.5mm pitch)
- 48-pin RGZ Very Thin Quad Flatpack No-Lead (VQFN) (0.5mm pitch)
- Operating Characteristics
- Supply voltage: 3.3V
- Ambient Temperature Range(TA): –40°C up to 105°C
- Device Cores
- Arm Cortex-M33 32-bit CPU up to 200MHz
- Floating Point Unit (FPU), Custom Datapath Extension (CDE), Memory Protection Unit (MPU) and Micro Trace Buffer (MTB)
- DSP Extension and 32-bit Trigonometric Math Unit (TMU) accelerates trigonometric calculations
- DMIPS=310 and Coremark=800
- 1x TinyEngineTM Neural-Network Processing Unit (NPU) optimized for time-series Edge AI enablement
- Memories
- Up to 512kB (2 banks of up to 256kB, 1kB sectors) of non-volatile flash memory
- 144-bit word with Error Correction Code
- Bank swap for dual-image firmware
- Up to 128kB of 0-wait state SRAM
- Hardware parity and 1kB instruction cache
- External Peripheral Interface (EPI) supporting SDRAM, ASRAM, or ASIC/FPGA external interfaces
- High-Performance Analog Peripherals
- 3x SAR Analog-to-digital Converters (ADCs)
- 6.67MSPS with 12-bit resolution
- Each ADC supports up to 32 channels
- Configurable 1.65V or 2.5V internal shared voltage reference (VREF)
- Support for external voltage reference (VREF)
- Hardware oversampling and undersampling modes, with accumulation, averaging and outlier rejection
- 4x Analog Comparator Sub-systems (CMPSS)
- 2x Comparators with Window Functionality
- 2x 10-bit effective DAC and 2x digital filters
- CMPSS[2:3] support buffered DACL_OUT to pin
- 3x Programmable Gain Amplifiers (PGA)
- Unity Gain Support
- Inverting and non-inverting gain mode support
- Gain options: 1, 2/-1, 4/-3, 8/-7, 16/-15, 32/-31, 64/-63
- 4:1 input mux supporting up to 12 channels
- Programmable output filtering
- Programmable analog connections between ADC, PGAs, CMPSS and DAC
- Optimized Low-Power Modes
- RUN: 49mA @ 200MHz
- STANDBY: 1.84mA with CPU execution resume and 32kB SRAM retention
- SHUTDOWN: <5µA with IO wake-up capability
- Flexible System Peripherals
- 12-channel Data Movement Architecture (DMA) controller
- Nested Vectored Interrupt Controller (NVIC)
- Up to 107 GPIO with Input/Output XBAR connectivity
- 8 GPIOs with Shutdown Wakeup Capability
- 1x Windowed Watchdog Timer (WWDT)
- Independent 32kHz clock with programmable divider
- 25-bit counter with configurable timer periods
- 2x general-purpose timers
- TIMG4 (32-bit), TIMG12 (16-bit)
- Pre-scaler, Compare/Capture, Shadow
- Up to 2x channels each
- Real-time Control Peripherals
- 5x Motor Control Pulse Width Modulation (MCPWM) modules
- 6 PWM channels per module with 16-bit time base
- 4 Start Of Conversion (SOCs) per module enable precise ADC sampling for single shunt or three shunt current sensing mode
- Support dead-band, trip event and time base synchronization
- 2x Enhanced Capture (eCAP) modules
- 32-bit timer for speed, elapsed time, period and duty cycle measurements
- 1x alternative PWM channel per module
- 3x Enhanced Quadrature Encoder Pulse (eQEP)
- Supports linear or rotary incremental encoder interface
- Edge capture unit for optimized speed measurement at low speed
- Device Crossbars (INPUTXBAR, OUTPUTXBAR, PWMXBAR)
- Flexibility to route signals from GPIO to other modules
-
For example, the INPUTXBAR is used to route signals from a GPIO to other modules such as ADC, CMPSS, MCPWM, eCAP, eQEP, and external interrupts
- Enhanced Serial Communication Interfaces
- Clock System
- Internal 4MHz/32MHz oscillator (SYSOSC)
- Internal 32kHz oscillator (LFOSC)
- System Phase-locked loop (SYSPLL) up to 200MHz
- External 4MHz to 25MHz crystal oscillator (XTAL)
- External 4MHz to 48MHz clock input (HFCLK)
- OS Support
- FreeRTOS, Zephyr, Baremetal
- Safety
- Enabling IEC61508 SIL-2 and SIL-3 systems
- Data Integrity and Encryption
- Secure Boot/FWU/Debug/JTAG Lock
- Secure Key Storage and Management
- Privileged/Non-Privileged resource partitioning
- Flash Write/Erase/Hide Protections
- Device Life cycle Management
- AES Encryption with 128- or 256-bit Key
- Unique Identification Number (UID)
- Internal Diagnostic Modules
- Cyclic Redundancy Checker (CRC-16, CRC-32)
- Integrated Temperature Sensor
- Integrated BOR/POR Supply Monitors
- Development Support
- JTAG (4-pin) and Serial Wire Debug (SWD) (2-pin)
- Micro Trace Buffer (MTB)
- Embedded Trace Macrocell (ETM) (TRACE_DATA[0:3])
- Supports Serial Trace and Parallel Trace
- Package Options
- 128-pin PDT Thin Quad Flat Package (TQFP) (0.4mm pitch)
- 100-pin PZ Low-profile Quad Flat Pack (LQFP) (0.5mm pitch)
- 80-pin PN Low-profile Quad Flat Pack (LQFP) (0.5mm pitch)
- 64-pin PM Low-profile Quad Flat Pack (LQFP) (0.5mm pitch)
- 48-pin PT Low-profile Quad Flat Pack (LQFP) (0.5mm pitch)
- 48-pin RGZ Very Thin Quad Flatpack No-Lead (VQFN) (0.5mm pitch)
- Operating Characteristics
- Supply voltage: 3.3V
- Ambient Temperature Range(TA): –40°C up to 105°C