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ADS1287D
  • ADS1287D
  • ADS1287D

ADS1287D

ACTIVE

Low-power 1-kSPS 2-ch (simultaneous) delta-sigma ADC with PGA for seismic and energy exploration

Texas Instruments ADS1287D Product Info

1 April 2026 0

Parameters

Resolution (Bits)

24

Sample rate (max) (ksps)

1

Number of input channels

2

Interface type

SPI

Architecture

Delta-Sigma

Input type

Differential

Multichannel configuration

Simultaneous Sampling

Rating

Catalog

Reference mode

External

Input voltage range (max) (V)

1.15, 3.75

Input voltage range (min) (V)

-1.6, 1

Features

PGA

Operating temperature range (°C)

-40 to 85

Power consumption (typ) (mW)

4.4

Analog supply voltage (min) (V)

-2.5, 0

Analog supply voltage (max) (V)

2.5, 5

Digital supply (min) (V)

2.25

Digital supply (max) (V)

3.6

Package

VQFN (RHB)-32-25 mm² 5 x 5

Features

  • SNR: 114 dB (50 Hz–200 Hz, Gain = 1)
  • Power: 2.2 mW (Per ADC)
  • THD: –115 dB
  • CMRR: 110 dB
  • High-Impedance CMOS PGA:
    • Gains 1, 2, 4, 8, and 16
  • Data Rates: 62.5 SPS to 1000 SPS
  • Flexible Digital Filter:
    • Sinc + FIR + IIR (Selectable)
    • Linear and Minimum Phase Response
    • Programmable High-Pass Filter
  • Sensor-Test Current Sources
  • Offset and Gain Calibration
  • Synchronization Control
  • SPI™-Compatible Interface
  • Analog Power Supply: 5 V or ±2.5 V
  • Digital Power Supply: 2.5 V to 3.3 V
  • SNR: 114 dB (50 Hz–200 Hz, Gain = 1)
  • Power: 2.2 mW (Per ADC)
  • THD: –115 dB
  • CMRR: 110 dB
  • High-Impedance CMOS PGA:
    • Gains 1, 2, 4, 8, and 16
  • Data Rates: 62.5 SPS to 1000 SPS
  • Flexible Digital Filter:
    • Sinc + FIR + IIR (Selectable)
    • Linear and Minimum Phase Response
    • Programmable High-Pass Filter
  • Sensor-Test Current Sources
  • Offset and Gain Calibration
  • Synchronization Control
  • SPI™-Compatible Interface
  • Analog Power Supply: 5 V or ±2.5 V
  • Digital Power Supply: 2.5 V to 3.3 V

Description

The ADS1287D device is a dual, simultaneous-sampling, analog-to-digital converter (ADC), with an integrated programmable gain amplifier (PGA) and finite-impulse-response (FIR) digital filter. The ADC is suitable for the demanding needs of low-power, seismic data acquisition.

The ADC features a programmable-gain, high-impedance amplifier suitable for direct connection of geophone and hydrophone sensors to the ADC over a wide range of input signals (±2.5 V to ±0.156 V). Dual 100-nA current sources are integrated into the ADC inputs for field testing of sensors.

The ADC incorporates a fourth-order, inherently stable, delta-sigma (ΔΣ) modulator. The modulator digital output is filtered and decimated by the internal FIR digital filter to yield the ADC conversion result.

The FIR digital filter provides data rates up to 1000 samples per second (SPS). The high-pass filter (HPF) removes DC and low-frequency components from the conversion result. On-chip gain and offset scaling registers support system calibration.

Total device power consumption is 4.4 mW. The ADC is packaged in a compact 5-mm × 5-mm VQFN package and is fully specified over the –40°C to +85°C temperature range.

The ADS1287D device is a dual, simultaneous-sampling, analog-to-digital converter (ADC), with an integrated programmable gain amplifier (PGA) and finite-impulse-response (FIR) digital filter. The ADC is suitable for the demanding needs of low-power, seismic data acquisition.

The ADC features a programmable-gain, high-impedance amplifier suitable for direct connection of geophone and hydrophone sensors to the ADC over a wide range of input signals (±2.5 V to ±0.156 V). Dual 100-nA current sources are integrated into the ADC inputs for field testing of sensors.

The ADC incorporates a fourth-order, inherently stable, delta-sigma (ΔΣ) modulator. The modulator digital output is filtered and decimated by the internal FIR digital filter to yield the ADC conversion result.

The FIR digital filter provides data rates up to 1000 samples per second (SPS). The high-pass filter (HPF) removes DC and low-frequency components from the conversion result. On-chip gain and offset scaling registers support system calibration.

Total device power consumption is 4.4 mW. The ADC is packaged in a compact 5-mm × 5-mm VQFN package and is fully specified over the –40°C to +85°C temperature range.

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