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SY87701A
  • SY87701A

SY87701A

In Production

The SY87701AL is a complete Clock Recovery and Data Retiming integrated circuit for data rates from 28Mbps up to 1.3Gbps NRZ. The device is ideally suited for SONET/SDH/ATM and Fibre Channel applications and other high-speed data transmission systems. Clock recovery and data retiming is performed by synchronizing the on-chip VCO directly to the incoming data stream. The VCO center frequency is controlled by the reference clock frequency and the selected divide ratio. On-chip clock generation is performed through the use of a frequency multiplier PLL with a byte rate source as reference. The SY87701AL also includes a link fault detection circuit....

Microchip Technology SY87701A Product Info

16 April 2026 0

Parameters

Part Type

Clock and Data Recovery

Power Supply (V)

3.3

Features

  • Industrial temperature range (-40°C to +85°C)
  • 3.3V power supply
  • Clock and data recovery from 28Mbps up to 1.3Gbps NRZ data stream, clock generation from 32Mbps to 1.25Gbps
  • Complies with Bellcore, ITU/CCITT and ANSI specifications for applications such as OC-1, OC-3, OC-12, ATM, FDDI, Fibre Channel and Gigabit Ethernet as well as proprietary applications
  • Two on-chip PLLs:one for clock generation and another for clock recovery
  • Selectable reference frequencies
  • Differential PECL high-speed serial I/O
  • Line receiver input: no external buffering needed
  • Link fault indication
  • 100k ECL compatible I/O
  • Available in 32-pin ePad-TQFP package

    • Description

    The SY87701AL is a complete Clock Recovery and Data Retiming integrated circuit for data rates from 28Mbps up to 1.3Gbps NRZ. The device is ideally suited for SONET/SDH/ATM and Fibre Channel applications and other high-speed data transmission systems. Clock recovery and data retiming is performed by synchronizing the on-chip VCO directly to the incoming data stream. The VCO center frequency is controlled by the reference clock frequency and the selected divide ratio. On-chip clock generation is performed through the use of a frequency multiplier PLL with a byte rate source as reference. The SY87701AL also includes a link fault detection circuit.

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