0
In Production
Max Duty Cycle (%) |
100 |
IOUT |
1 |
IOUT LDO |
300 |
LOWQMode |
Yes |
# of Regulated Outputs (Bucks) |
4 |
# of Regulated Outputs (Linear) |
2 |
OjaCW |
25.8 |
Target Application |
MPU |
Target Processor |
SAM9x6,SAMA5DX,SAM9X7,SAMA7G |
VIN Max V (volt) |
5.5 |
VIN Min V (volt) |
2.7 |
The MCP16502 is an optimally integrated PMIC compatible with Microchip's eMPUs (Embedded Microprocessor Units), requiring Dynamic Voltage Scaling (DVS) with the use of High-Performance mode (HPM). It is compatible with SAMA5DX and SAM9X6 MPUs, which are supported by dedicated device variants that optimize the solution BOM.
The MCP16502 integrates four DC-DC Buck regulators and two auxiliary LDOs, and provides a comprehensive interface to the MPU, which includes an interrupt flag and a 1 MHz I2C interface. All Buck channels can support loads up to 1A and are 100% duty cycle-capable. Two 300 mA LDOs are provided such that sensitive analog loads can be supported. The DDR memory voltage (Buck2 output) is selectable by means of a 3-state input pin. The voltage selection set allows easy migration across different generations of memory. The default power channel sequencing is built-in according to the requirements of the MPU. A dedicated pin (LPM) facilitates the transition to Low-Power modes and the implementation of Backup mode with DDR in self-refresh (Hibernate mode). The MCP16502 features a low no-load operational quiescent current and draws less than 10 μA in full shutdown. Active discharge resistors are provided on each output. All Buck channels support safe start-up into pre-biased outputs.
The MCP16502 is available in a 32-pin 5 mm x 5 mm VQFN package with an operating junction temperature range from -40°C to +125°C. MCP16502 is also available as AEC-Q100 qualified variant.
Check out MCP16502 in action powering the Wireless System-on-Module (WLSOM)