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S70KL1283DPBHA023
  • S70KL1283DPBHA023

S70KL1283DPBHA023

Active and preferred

The S70KL1283DPBHA023 is a 128 Mb HYPERRAM™ self-refresh DRAM (PSRAM) for high-bandwidth memory expansion via an octal xSPI DDR interface with RWDS strobe and RESET#. It supports 1.8 V or 3.0 V I/O, clocks to 200 MHz for up to 400 MBps (3200 Mbps) throughput, and has 35 ns maximum access time. Hybrid Sleep and Deep Power Down modes plus AEC-Q100 qualification support automotive designs in a 24-ball FBGA.

Infineon Technologies S70KL1283DPBHA023 Product Info

16 April 2026 0

Parameters

Density

128 MBit

Family

KL-3

Initial Access Time

36 ns

Interface Bandwidth

333 MByte/s

Interface Frequency (SDR/DDR) (MHz)

- / 166

Interfaces

xSPI (Octal)

Lead Ball Finish

N/A

Operating Temperature range

-40 °C to 85 °C

Operating Voltage range

2.7 V to 3.6 V

Operating Voltage

3 V

Peak Reflow Temp

260 °C

Planned to be available until at least

See roadmap

Qualification

Automotive

Technology

HYPERRAM

Features

  • Octal xSPI interface
  • 1.7 V to 2.0 V VCC/VCCQ
  • 2.7 V to 3.6 V VCC/VCCQ
  • 200 MHz maximum clock rate
  • DDR on both clock edges
  • Throughput up to 400 MBps
  • 8-bit DQ[7:0] data bus
  • RWDS strobe and write data mask
  • Optional differential clock CK/CK#
  • Optional DCARS read strobe
  • Linear and wrapped burst modes
  • Hybrid Sleep and Deep Power Down

Description

  • Octal DDR boosts system bandwidth
  • 400 MBps supports fast frame buffers
  • 200 MHz fits high-speed controllers
  • 8-bit bus reduces signal routing
  • RWDS eases DDR timing margins
  • DCARS improves DDR read eye margin
  • Wrapped bursts reduce access latency
  • Burst modes match cache or streaming
  • Sleep/DPD lowers standby power
  • Partial refresh cuts idle refresh power
  • Dual-voltage fits 1.8 V or 3.0 V rails
  • RESET# enables quick fault recovery

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