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S27KL0642GABHM020
  • S27KL0642GABHM020

S27KL0642GABHM020

Active and preferred

The S27KL0642GABHM020 is a 64-Mbit HyperRAM self-refresh DRAM for automotive AEC-Q100 Grade 1 (-40°C to 125°C). It uses a HyperBus interface with 8-bit DDR DQ[7:0], RWDS, CS#, and RESET#, supporting up to 200 MHz clock and 400 MBps throughput. The 3.0 V-only device operates from 2.7 V to 3.6 V and supports Hybrid Sleep, Deep Power Down, and configurable linear or wrapped burst lengths in a 24-ball 1.00 mm pitch FBGA.

Infineon Technologies S27KL0642GABHM020 Product Info

16 April 2026 0

Parameters

Density

64 MBit

Family

KL-2

Initial Access Time

35 ns

Interface Bandwidth

400 MByte/s

Interface Frequency (SDR/DDR) (MHz)

- / 200

Interfaces

HYPERBUS

Lead Ball Finish

Sn/Ag/Cu

Operating Temperature range

-40 °C to 125 °C

Operating Voltage range

2.7 V to 3.6 V

Peak Reflow Temp

260 °C

Planned to be available until at least

See roadmap

Qualification

Automotive

Technology

HYPERRAM

Apps

Domain controller for ADAS & autonomous driving

Features

  • HyperBus Interface
  • 8-bit DDR data bus (DQ[7:0])
  • 200 MHz maximum clock rate
  • Up to 400 MBps throughput
  • 35 ns max initial access (tACC)
  • RWDS read strobe/write mask
  • Optional differential CK/CK#
  • Optional DCARS strobe phase shift
  • Linear or wrapped burst lengths
  • Active Clock Stop state
  • Hybrid Sleep retains data
  • Deep Power Down stops refresh

Description

  • Reduces pins vs parallel DRAM
  • High bandwidth for fast loads
  • 35 ns helps cut read latency
  • RWDS improves DDR timing margin
  • Diff clock helps SI and noise
  • DCARS improves read eye margin
  • Burst modes match system access
  • Clock stop lowers stall power
  • Hybrid Sleep saves power, keeps data
  • DPD minimizes power when unused
  • Works with 1.8 V or 3.0 V rails
  • 2 kV HBM ESD improves durability

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