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S27KL0642DPBHI023
  • S27KL0642DPBHI023

S27KL0642DPBHI023

Active and preferred

S27KL0642DPBHI023 is a 64 Mb HYPERRAM self-refresh DRAM (PSRAM) with a HYPERBUS interface using CS#, CK, 8-bit DQ, RWDS, and RESET#. It runs from a 2.7 V to 3.60 V VCC supply, supports up to 166 MHz DDR transfers, and is specified for -40°C to +105°C (AEC-Q100 Grade 2). Configurable linear or wrapped bursts (16 to 128 bytes) plus deep power-down of 15 µA at 3.6 V, 105°C support fast external memory expansion.

Infineon Technologies S27KL0642DPBHI023 Product Info

16 April 2026 1

Parameters

Density

64 MBit

Family

KL-2

Initial Access Time

36 ns

Interface Bandwidth

333 MByte/s

Interface Frequency (SDR/DDR) (MHz)

- / 166

Interfaces

HYPERBUS

Lead Ball Finish

N/A

Operating Temperature range

-40 °C to 85 °C

Operating Voltage range

2.7 V to 3.6 V

Operating Voltage

3 V

Peak Reflow Temp

260 °C

Planned to be available until at least

See roadmap

Qualification

Industrial

Technology

HYPERRAM

Apps

Consumer electronics, Home appliances, Programmable logic controller (PLC)

Features

  • HYPERBUS™ interface
  • 1.8 V or 3.0 V I/O support
  • Single-ended or diff clock option
  • 8-bit DDR data bus (DQ[7:0])
  • RWDS strobe and write data mask
  • Optional DCARS read strobe
  • 200 MHz maximum clock rate
  • Up to 400 MBps data throughput
  • Max access time (tACC) 35 ns
  • Hybrid sleep retains data
  • Deep power-down stops refresh
  • ESD: 2 kV HBM, 500 V CDM

Description

  • Fast MCU memory expansion over x8
  • Works with 1.8 V or 3.0 V rails
  • Clock options ease PCB constraints
  • DDR x8 reduces routing complexity
  • RWDS improves DDR timing margins
  • DCARS widens read data eye margin
  • 200 MHz supports high bandwidth I/O
  • 400 MBps enables fast frame buffers
  • 35 ns tACC reduces access latency
  • Hybrid sleep saves power, keeps data
  • DPD minimizes power when data not needed
  • High ESD improves handling robustness

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