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S26HS02GTFPBHB040
  • S26HS02GTFPBHB040

S26HS02GTFPBHB040

Active and preferred

The S26HS02GTFPBHB040 is a 2 Gb SEMPER™ NOR Flash memory using Infineon's 45-nm MIRRORBIT™ technology, compliant with JEDEC JESD251 xSPI and supporting HYPERBUS™ (DDR up to 332 MBps at 166 MHz) and legacy SPI. It features ISO 26262 ASIL-B compliance, built-in ECC, and advanced sector protection. Operating from 1.7 V to 2.0 V, it supports AEC-Q100 Grade 2 (-40°C to +105°C) and ensures at least 2,560,000 program-erase cycles and 25 years data retention.

Infineon Technologies S26HS02GTFPBHB040 Product Info

16 April 2026 0

Parameters

Classification

ISO 26262-compliant

Density

2 GBit

Family

HS-T

Interface Bandwidth

333 MByte/s

Interface Frequency (SDR/DDR) (MHz)

- / 166

Interfaces

HYPERBUS

Lead Ball Finish

Sn/Ag/Cu

Operating Temperature range

-40 °C to 105 °C

Operating Voltage range

1.7 V to 2 V

Operating Voltage

1.8 V

Peak Reflow Temp

260 °C

Planned to be available until at least

2037

Publish in NPSG

N

Publish in PSG

N

Qualification

Automotive

Features

  • MIRRORBIT technology stores 2 bits/cell
  • HYPERBUS interface supports DDR up to 332
  • JEDEC JESD251 xSPI compliant
  • Legacy SPI interface (SDR up to 21 MBps)
  • Flexible sector architecture: uniform
  • Page programming buffer: 256 or 512 bytes
  • OTP secure silicon region: 1024 bytes
  • Functional safety: ISO26262 ASIL B compliant
  • Interface and data integrity CRC
  • Built-in ECC: SECDED on memory array data
  • Advanced sector protection
  • Hardware reset via CS# or RESET# pin

Description

  • 2 bits/cell increases memory density
  • 332 MBps DDR enables fast data access
  • xSPI compliance ensures broad compatibility
  • Dual interface eases system integration
  • Flexible sectors suit varied application
  • Large buffer boosts programming speed
  • OTP region secures sensitive data
  • Functional safety supports automotive use
  • CRC/ECC enhance data reliability
  • Sector protection prevents accidental
  • Hardware reset improves system robustness

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