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2EDN7523R
  • 2EDN7523R

2EDN7523R

The gate driver accepts low voltage TTL and 3.3V CMOS signals (+20V to -10VDC) to prevent ground bouncing. Outputs sink/source 5A with rail-to-rail stage and low impedances. 1ns delay matching allows doubling current up to 10A by paralleling channels. Standard pin-outs and flexible logic configurations save R&D time. Available in PG-DSO-8, PG-VDSON-8, and PG-TDSSO-8 packages for improved thermal performance.

Infineon Technologies 2EDN7523R Product Info

16 April 2026 0

Parameters

Channels

2

Configuration

Low-side

Input Vcc range

4.2 V to 20 V

Isolation Type

Non-isolated

Output Current (Source)

5 A

Output Current (Sink)

5 A

Package

PG-TSSOP-8

Product Name

2EDN7523R

Qualification

Industrial

Turn Off Propagation Delay

19 ns

Turn On Propagation Delay

17 ns

VBS UVLO (Off)

3.9 V

VBS UVLO (On)

4.2 V

Voltage Class

20 V

Features

  • 5A peak source/sink current
  • 5ns (typ.) rise/fall times
  • < 10ns propagation delay tolerance
  • 8V UVLO option
  • Propagation delay for both & for enable
  • -10V control and enable inputrobustness
  • Outputs robust against reverse current
  • 2 independent channels
  • < 1ns channel-to-channel miss-match
  • Industry standard pin-out and packages

Description

  • Fast Miller plateau transition
  • Fast and reliable MOSFET turn-off
  • Saves switching diodes
  • Boost drive I by concurr't switching 2ch
  • Straight-forward design up-grades

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