MAX96752

RECOMMENDED FOR NEW DESIGNS

GMSL2 Deserializer with Dual LVDS (OLDI) Output

Analog Devices MAX96752 Product Info

10 February 2026 6

Features

1 x 4, 2 x 4, or 1 x 8 OLDI Output Lane Configurations
3Gbps or 6Gbps Forward Link Rates for System and Power Flexibility
Full-Duplex Capability Over a Single Wire
Supports Up to 300MHz PCLK
Supports Video Replication and Dual-View Splitting for Driving Two Displays
Uses Low-Cost 50Ω Coax or 100Ω STP Cables
Forward and Reverse I²S or 7.1 TDM Audio
Optional Internal VDD Regulator
ASIL-Relevant Functional Safety Features
- ASIL-B Compliant
- 16-Bit CRC Protection of Control Channel Data (I²C, UART, SPI, GPIO, Audio)
- Retransmission of All Control Channel Data (I²C, UART, SPI, GPIO, Audio) Upon Error Detection
- Optional 32-Bit Video Line Cyclic Redundancy Check (CRC)
- Selectable Interrupts for Fault Detection
- Video Watermark Detection

Performance Tools Ensure High Link Margin
- Continuous Adaptive Equalization on GMSL links
- Forward and Reverse Channel Pseudorandom Binary Sequence (PRBS) Generator and Checker for BER Testing of Serial I/O Links
- Eye-Opening Monitor for Continuous Link Margin Diagnosis
Concurrent Control Channel for Device Configuration and Communicating with Remote Peripherals
- I²C, UART, Pass-Through I²C/UART, SPI, and Tunneled or Register-Programmable GPIO
- Settable Priority Levels
- Eight Hardware Programmable Device Addresses
- Up to 14 Programmable General Purpose Input/Output (GPIO)
- Sleep Mode with Register State Retention
Compact 8mm x 8mm TQFN Package with Exposed Pad

Part details & applications

The MAX96752 deserializers convert a single- or dual-link GMSL™ serial input to single or dual OLDI. They also send and receive side-channel and peripheral control data, enabling full-duplex, single-wire transmission of video and bidirectional data.

The OLDI output can be configured as single-port (4 or 8 lanes) or dual-port (2 x 4 lanes) for flexibility in driving displays with a variety of resolutions. Each port accommodates pixel clock rates of up to 150MHz, and in dual-port mode, the MAX96752 support a combined pixel clock of up to 300MHz.

The GMSL2 concurrent control channel operates in I²C or UART mode. Two additional pass-through I²C or UART channels and a pass-through SPI channel are provided for peripheral control. The bidirectional audio channel supports I²S stereo and up to 8 channels in TDM mode.

Operation is specified over the -40°C to +105°C automotive temperature range. The devices are AEC-Q100 qualified.

Data can be transmitted over low-cost 50Ω Coax or 100Ω STP cables that meet the GMSL2 channel specification.

APPLICATIONS

Cluster and Heads-Up Displays
Central Information Displays
Rear-Seat Infotainment Displays

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