Analog Devices LTC4300A-3 Product Info

• Bidirectional Buffer* for SDA and SCL Lines Increases Fanout
• Prevents SDA and SCL Corruption During Live Board Insertion and Removal From Backplane
• Logic Threshold ENABLE Input
• Isolates Input SDA and SCL Lines from Output
• Compatible with I²C, I²C Fast Mode and SMBus Standards (Up to 400kHz Operation)
• 1V Precharge on all SDA and SCL Lines
• Supports Clock Stretching, Arbitration and Synchronization
• 5V to 3.3V Level Translation
• High Impedance SDA, SCL Pins for V_CC = 0V, V_CC2 = 0V
• Small 8-Lead DFN and MSOP Packages

The LTC4300A-3 hot swappable 2-wire bus buffer allows I/O card insertion into a live backplane without corruption of the data and clock busses. When the connection is made, the LTC4300A-3 provides bidirectional buffering, keeping the backplane and card capacitances isolated. Rise-time accelerator circuitry allows the use of weaker DC pull-up currents while still meeting rise-time requirements. During insertion, the SDA and SCL lines are precharged to 1V to minimize bus disturbances.

The LTC4300A-3 provides level translation between 3.3V and 5V supplies. The backplane and card can both be powered with supplies ranging from 2.7V to 5.5V. The LTC4300A-3 also incorporates a CMOS threshold ENABLE pin which forces the part into a low current mode and isolates the card from the backplane. When driven to V_CC, the ENABLE pin sets normal operation.

The LTC4300A-3 is available in the MSOP and 3mm × 3mm DFN packages.

*Patent pending.

Applications

• Hot Board Insertion
• Servers
• Capacitance Buffer/Bus Extender
• Desktop Computer