Analog Devices ADGS1212 Product Info

• SPI interface with error detection
  
  • Includes CRC, invalid read/write address, and SCLK count error detection
  • Supports burst mode and daisy-chain mode
  • Industry-standard SPI Mode 0 and SPI Mode 3 compatible
• Guaranteed break-before-make switching allowing external wiring of switches to deliver multiplexer configurations
• V_SS to V_DD analog signal range
  
  • Fully specified at ±15 V and +12 V supply
  • ±4.5 V to ±16.5 V dual-supply operation
  • 5 V to 16.5 V single-supply operation
• Ultralow capacitance and leakage allows fast settling time
  
  • 1 pF typical off switch drain capacitance at 25°C, ±15 V
  • 2.6 pF typical on switch capacitance at 25°C, ±15 V
  • <1 pC typical charge injection at 25°C
• 1.8 V logic compatibility with 2.7 V ≤ V_L ≤ 3.3 V

The ADGS1212 contains four independent single-pole/single-throw (SPST) switches. A serial peripheral interface (SPI) controls the switches. The SPI interface has robust error detection features such as cyclic redundancy check (CRC) error detection, invalid read/write address detection, and SCLK count error detection.

It is possible to daisy-chain multiple ADGS1212 devices together. Daisy-chain mode enables the configuration of multiple devices with minimal digital lines. The ADGS1212 can also operate in burst mode to decrease the time between SPI commands.

iCMOS construction ensures ultralow power dissipation, making the device ideal for portable and battery-powered instruments.

Each switch conducts equally well in both directions when on, and each switch has an input signal range that extends to the supplies.

In the off condition, signal levels up to the supplies are blocked. The ultralow capacitance and charge injection of these switches make them ideal solutions for data acquisition and sample-andhold applications where low glitch and fast settling are required.

Fast switching speed coupled with high signal bandwidth make the device suitable for video signal switching.

Multifunction pin names may be referenced by their relevant function only.

Product Highlights

1. SPI interface removes the need for parallel conversion, logic traces, and reduces the general-purpose input/output (GPIO) channel count.
2. Daisy-chain mode removes additional logic traces when multiple devices are used.
3. CRC error detection, invalid read/write address detection, and SCLK count error detection ensure a robust digital interface.
4. CRC and error detection capabilities allow the ADGS1212 to be used in safety critical systems.
5. Guaranteed break-before-make switc