0
AD9671
  • AD9671
  • AD9671

AD9671

RECOMMENDED FOR NEW DESIGNS

Octal Ultrasound AFE with Digital Demodulator, JESD204B

Analog Devices AD9671 Product Info

10 February 2026 5

Features

  • 8 channels of LNA, VGA, AAF, ADC, and digital demodulator/decimator
    • Low power: 150 mW per channel, time gain compensation (TGC) mode, 40 MSPS
      62.5 mW per channel, continuous wave (CW) mode; <30 mW in power-down mode
    • 10 mm × 10 mm, 144-ball CSP_BGA
    • TGC channel input referred noise: 0.82 nV/√Hz, maximum gain
    • Flexible power-down modes
    • Fast recovery from low power standby mode: <2 μs
  • Low noise preamplifier (LNA)
    • Input referred noise: 0.78 nV/√Hz, gain = 21.6 dB
    • Programmable gain: 15.6 dB/17.9 dB/21.6 dB
    • 0.1 dB compression: 1000 mV p-p/750 mV p-p/450 mV p-p
    • Flexible active input impedance matching
  • Variable gain amplifier (VGA)
    • Attenuator range: 45 dB, linear-in-dB gain control
    • Postamplifier (PGA) gain: 21 dB/24 dB/27 dB/30 dB
  • See data sheet for additional features

Part details & applications

The AD9671 is designed for low cost, low power, small size, and ease of use for medical ultrasound applications. It contains eight channels of a VGA with an LNA, a CW harmonic rejection I/Q demodulator with programmable phase rotation, an AAF, an ADC, and a digital demodulator and decimator for data processing and bandwidth reduction.

Each channel features a maximum gain of up to 52 dB, a fully differential signal path, and an active input preamplifier termination. The channel is optimized for high dynamic performance and low power in applications where a small package size is critical.

The LNA has a single-ended to differential gain that is selectable through the serial port interface (SPI). Assuming a 15 MHz noise bandwidth (NBW) and a 21.6 dB LNA gain, the LNA input SNR is 94 dB. In CW Doppler mode, each LNA output drives an I/Q demodulator that has independently programmable phase rotation with 16 phase settings.

Power-down of individual channels is supported to increase battery life for portable applications. Standby mode allows quick power-up for power cycling. In CW Doppler operation, the VGA, AAF, and ADC are powered down. The ADC contains several features designed to maximize flexibility and minimize system cost, such as a programmable clock, data alignment, and programmable digital test pattern generation. The digital test patterns include built-in fixed patterns, built-in pseudorandom patterns, and custom user defined test patterns entered via the SPI.

Applications

  • Medical imaging/ultrasound
  • Nondestructive testing (NDT)

Subscribe to Welllinkchips !
Your Name
* Email
Submit a request