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AD9233
  • AD9233
  • AD9233

AD9233

PRODUCTION

12-Bit, 80 MSPS/105 MSPS/125 MSPS, 1.8 V Analog-to-Digital Converter

Analog Devices AD9233 Product Info

10 February 2026 0

Features

  • Chinese data sheet available
  • 1.8 V analog supply operation
  • 1.8 V to 3.3 V output supply
  • DNL = ±0.15 LSB
  • SFDR = 85 dBc to 70 MHz input
  • Low power: 395 mW @ 125 MSPS
  • Differential input with 650 MHz bandwidth
  • On-chip voltage reference and sample-and-hold amplifier
  • 11-bit 140Msps device available (AD80141)
  • Flexible analog input: 1 V p-p to 2 V p-p range
  • Offset binary, Gray code, or twos complement data format
  • Data output clock and clock duty cycle stabilizer
  • Serial port control 
  • Built-in selectable digital test pattern generation
  • Programmable clock and data alignment

Part details & applications

The AD9233 is a monolithic, single 1.8 V supply, 12-bit, 80 MSPS/ 105 MSPS/125 MSPS analog-to-digital converter (ADC), featuring a high performance sample-and-hold amplifier (SHA) and on-chip voltage reference. The product uses a multistage differential pipeline architecture with output error correction logic to provide 12-bit accuracy at 125 MSPS data rates and guarantees no missing codes over the full operating temperature range.

The wide bandwidth, truly differential SHA allows a variety of user-selectable input ranges and offsets, including single-ended applications. It is suitable for multiplexed systems that switch full-scale voltage levels in successive channels and for sampling single-channel inputs at frequencies well beyond the Nyquist rate. Combined with power and cost savings over previously available ADCs, the AD9233 is suitable for applications in communications, imaging, and medical ultrasound.

A differential clock input controls all internal conversion cycles. A duty cycle stabilizer (DCS) compensates for wide variations in the clock duty cycle while maintaining excellent overall ADC performance.

The digital output data is presented in offset binary, Gray code, or twos complement formats. A data output clock (DCO) is provided to ensure proper latch timing with receiving logic.

The AD9233 is available in a 48-lead LFCSP and is specified over the industrial temperature range (−40°C to +85°C).