0
ACTIVE
Product type |
DDR |
Vin (min) (V) |
1.2 |
Vin (max) (V) |
3.6 |
Vout (min) (V) |
0.75 |
Vout (max) (V) |
1.25 |
Features |
S3/S5 Support |
Rating |
Catalog |
Operating temperature range (°C) |
-40 to 85 |
Iq (typ) (mA) |
0.5 |
DDR memory type |
DDR, DDR2, DDR3, DDR3L, LPDDR3 |
HVSSOP (DGQ)-10-14.7 mm² 3 x 4.9
The TPS51100 is a 3-A, sink/source tracking termination regulator. The device is specifically designed for low-cost and low-external component count systems where space is a premium.
The TPS51100 maintains fast transient response, only requiring 20 µF (2 × 10 µF) of ceramic output capacitance. The TPS51100 supports remote sensing functions and all features required to power the DDR and DDR2 VTT bus termination according to the JEDEC specification. The part also supports DDR3 VTT termination with VDDQ at 1.5 V (typical). In addition, the TPS51100 includes integrated sleep-state controls, placing VTT in Hi-Z in S3 (suspend to RAM) and soft-off for VTT and VTTREF in S5 (suspend to disk). The TPS51100 is available in the thermally efficient 10-pin MSOP PowerPAD™ package and is specified from 40°C to 85°C.
WELL LINK CHIPS GROUP CO.,LIMITED FLAT/RM 1802 BEVERLY HOUSE 93-107 LOCKHART ROAD WANCHAI HK
