Product
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TMS320F28035-EP
  • TMS320F28035-EP
  • TMS320F28035-EP

TMS320F28035-EP

ACTIVE

C2000™ Enhanced Product 32-bit MCU with 60 MHz, 128 KB flash, CLA

Texas Instruments TMS320F28035-EP Product Info

1 April 2026 0

Parameters

CPU

1 C28, 1 CLA

Frequency (MHz)

60

Flash memory (kByte)

128

RAM (kByte)

20

ADC type

12-bit

Total processing (MIPS)

120

Features

32-bit CPU timers, Single zone code security, Watchdog timer

UART

1

CAN (#)

1

PWM (Ch)

8, 12, 14

Number of ADC channels

13, 14, 16

Direct memory access (Ch)

0

SPI

1, 2

QEP

1

USB

No

Hardware accelerators

Control law accelerator

Edge AI enabled

Yes

Operating temperature range (°C)

-55 to 125

Rating

HiRel Enhanced Product

Communication interface

CAN, I2C, SPI, UART

Operating system

FreeRTOS

Nonvolatile memory (kByte)

128

Number of GPIOs

26, 33, 45

Security

Secure storage

Package

LQFP (PN)-80-196 mm² 14 x 14

Features

  • High-Efficiency 32-Bit CPU (TMS320C28x)
    • 60 MHz (16.67-ns Cycle Time)
    • 16 × 16 and 32 × 32 MAC Operations
    • 16 × 16 Dual MAC
    • Harvard Bus Architecture
    • Atomic Operations
    • Fast Interrupt Response and Processing
    • Unified Memory Programming Model
    • Code-Efficient (in C/C++ and Assembly)
  • Programmable Control Law Accelerator (CLA)
    • 32-Bit Floating-Point Math Accelerator
    • Executes Code Independently of the Main CPU
  • Endianness: Little Endian
  • JTAG Boundary Scan Support
    • IEEE Standard 1149.1-1990 Standard Test Access Port and Boundary Scan Architecture
  • Low Cost for Both Device and System:
    • Single 3.3-V Supply
    • No Power Sequencing Requirement
    • Integrated Power-On Reset and Brown-Out Reset
    • Low Power
    • No Analog Support Pins
  • Clocking:
    • Two Internal Zero-Pin Oscillators
    • On-Chip Crystal Oscillator and External Clock Input
    • Watchdog Timer Module
    • Missing Clock Detection Circuitry
  • Up to 45 Individually Programmable, Multiplexed GPIO Pins With Input Filtering
  • Peripheral Interrupt Expansion (PIE) Block That Supports All Peripheral Interrupts
  • Three 32-Bit CPU Timers
  • Independent 16-Bit Timer in Each Enhanced Pulse Width Modulator (ePWM)
  • On-Chip Memory
    • Flash, SARAM, OTP, Boot ROM Available
  • Code-Security Module
  • 128-Bit Security Key and Lock
    • Protects Secure Memory Blocks
    • Prevents Firmware Reverse Engineering
  • Serial Port Peripherals
    • One Serial Communications Interface (SCI) Universal Asynchronous Receiver/Transmitter (UART) Module
    • Two Serial Peripheral Interface (SPI) Modules
    • One Inter-Integrated-Circuit (I2C) Module
    • One Local Interconnect Network (LIN) Module
    • One Enhanced Controller Area Network (eCAN) Module
  • Enhanced Control Peripherals
    • ePWM
    • High-Resolution PWM (HRPWM)
    • Enhanced Capture (eCAP) Module
    • High-Resolution Input Capture (HRCAP) Module
    • Enhanced Quadrature Encoder Pulse (eQEP) Module
    • Analog-to-Digital Converter (ADC)
    • On-Chip Temperature Sensor
    • Comparator
  • Advanced Emulation Features
    • Analysis and Breakpoint Functions
    • Real-Time Debug Through Hardware
  • 80-Pin PN Low-Profile Quad Flatpack (LQFP)
  • Supports Defense, Aerospace, and Medical Applications:
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Available in Extended (–55°C to 125°C) Temperature Range
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability
  • High-Efficiency 32-Bit CPU (TMS320C28x)
    • 60 MHz (16.67-ns Cycle Time)
    • 16 × 16 and 32 × 32 MAC Operations
    • 16 × 16 Dual MAC
    • Harvard Bus Architecture
    • Atomic Operations
    • Fast Interrupt Response and Processing
    • Unified Memory Programming Model
    • Code-Efficient (in C/C++ and Assembly)
  • Programmable Control Law Accelerator (CLA)
    • 32-Bit Floating-Point Math Accelerator
    • Executes Code Independently of the Main CPU
  • Endianness: Little Endian
  • JTAG Boundary Scan Support
    • IEEE Standard 1149.1-1990 Standard Test Access Port and Boundary Scan Architecture
  • Low Cost for Both Device and System:
    • Single 3.3-V Supply
    • No Power Sequencing Requirement
    • Integrated Power-On Reset and Brown-Out Reset
    • Low Power
    • No Analog Support Pins
  • Clocking:
    • Two Internal Zero-Pin Oscillators
    • On-Chip Crystal Oscillator and External Clock Input
    • Watchdog Timer Module
    • Missing Clock Detection Circuitry
  • Up to 45 Individually Programmable, Multiplexed GPIO Pins With Input Filtering
  • Peripheral Interrupt Expansion (PIE) Block That Supports All Peripheral Interrupts
  • Three 32-Bit CPU Timers
  • Independent 16-Bit Timer in Each Enhanced Pulse Width Modulator (ePWM)
  • On-Chip Memory
    • Flash, SARAM, OTP, Boot ROM Available
  • Code-Security Module
  • 128-Bit Security Key and Lock
    • Protects Secure Memory Blocks
    • Prevents Firmware Reverse Engineering
  • Serial Port Peripherals
    • One Serial Communications Interface (SCI) Universal Asynchronous Receiver/Transmitter (UART) Module
    • Two Serial Peripheral Interface (SPI) Modules
    • One Inter-Integrated-Circuit (I2C) Module
    • One Local Interconnect Network (LIN) Module
    • One Enhanced Controller Area Network (eCAN) Module
  • Enhanced Control Peripherals
    • ePWM
    • High-Resolution PWM (HRPWM)
    • Enhanced Capture (eCAP) Module
    • High-Resolution Input Capture (HRCAP) Module
    • Enhanced Quadrature Encoder Pulse (eQEP) Module
    • Analog-to-Digital Converter (ADC)
    • On-Chip Temperature Sensor
    • Comparator
  • Advanced Emulation Features
    • Analysis and Breakpoint Functions
    • Real-Time Debug Through Hardware
  • 80-Pin PN Low-Profile Quad Flatpack (LQFP)
  • Supports Defense, Aerospace, and Medical Applications:
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Available in Extended (–55°C to 125°C) Temperature Range
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability

Description

The F28035 Piccolo™ family of microcontrollers provides the power of the C28x core and Control Law Accelerator (CLA) coupled with highly integrated control peripherals in low pin-count devices. This family is code-compatible with previous C28x-based code, and also provides a high level of analog integration.

An internal voltage regulator allows for single-rail operation. Enhancements have been made to the HRPWM to allow for dual-edge control (frequency modulation). Analog comparators with internal 10-bit references have been added and can be routed directly to control the PWM outputs. The ADC converts from 0 to 3.3-V fixed full-scale range and supports ratio-metric VREFHI/VREFLO references. The ADC interface has been optimized for low overhead and latency.

The F28035 Piccolo™ family of microcontrollers provides the power of the C28x core and Control Law Accelerator (CLA) coupled with highly integrated control peripherals in low pin-count devices. This family is code-compatible with previous C28x-based code, and also provides a high level of analog integration.

An internal voltage regulator allows for single-rail operation. Enhancements have been made to the HRPWM to allow for dual-edge control (frequency modulation). Analog comparators with internal 10-bit references have been added and can be routed directly to control the PWM outputs. The ADC converts from 0 to 3.3-V fixed full-scale range and supports ratio-metric VREFHI/VREFLO references. The ADC interface has been optimized for low overhead and latency.

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