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ACTIVE
Technology family |
LVC |
Supply voltage (min) (V) |
1.65 |
Supply voltage (max) (V) |
3.6 |
Number of channels |
4 |
IOL (max) (mA) |
24 |
Supply current (max) (µA) |
40 |
IOH (max) (mA) |
-24 |
Input type |
Standard CMOS |
Output type |
3-State |
Features |
Balanced outputs, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) |
Rating |
Catalog |
Operating temperature range (°C) |
-40 to 125 |
SOIC (D)-14-51.9 mm² 8.65 x 6
This quadruple bus buffer gate is designed for 1.65V to 3.6V VCC operation.
The SN74LVC125A device features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of this device as a translator in a mixed 3.3V/5V system environment.
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