0
ACTIVE
Technology family |
LV-A |
Supply voltage (min) (V) |
2 |
Supply voltage (max) (V) |
5.5 |
Number of channels |
4 |
IOL (max) (mA) |
16 |
Supply current (max) (µA) |
20 |
IOH (max) (mA) |
-16 |
Input type |
Standard CMOS |
Output type |
3-State |
Features |
Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) |
Rating |
Catalog |
Operating temperature range (°C) |
-40 to 125 |
SOIC (D)-14-51.9 mm² 8.65 x 6
The SN74LV126A quadruple bus buffer gates are designed for 2V to 5.5V VCC operation.
These quadruple bus buffer gates are designed for 2V to 5.5V VCC operation.
The SN74LV126A devices feature independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low.
To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.
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