0
ACTIVE
Number of channels |
2 |
Technology family |
HCT |
Supply voltage (min) (V) |
4.5 |
Supply voltage (max) (V) |
5.5 |
Input type |
TTL-Compatible CMOS |
Output type |
Push-Pull |
Clock frequency (max) (MHz) |
25 |
IOL (max) (mA) |
4 |
IOH (max) (mA) |
-4 |
Supply current (max) (µA) |
40 |
Features |
Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode |
Operating temperature range (°C) |
-40 to 85 |
Rating |
Catalog |
PDIP (N)-14-181.42 mm² 19.3 x 9.4
The ’HCT74 devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset ( PRE) or clear ( CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of CLK. Following the hold-time interval, data at the D input may be changed without affecting the levels at the outputs.
WELL LINK CHIPS GROUP CO.,LIMITED FLAT/RM 1802 BEVERLY HOUSE 93-107 LOCKHART ROAD WANCHAI HK
