• Ultra low additive jitter of 104 fs RMS
• Input - LVPECL, LVDS, CML, HCSL, LVCMOS
• Eight precision LVDS outputs
• Operating frequency up to 750 MHz
• Option for 2.5V or 3.3V power supply
• Current consumption - 106 mA
• On-chip Low Drop Out (LDO) Regulator for superior power supply noise rejection performance

The ZL40218 is an LVDS clock fanout buffer with eight identical output clock drivers capable of operating at frequencies up to 750MHz.

Inputs to the ZL40218 are externally terminated to allow use of precision termination components and to allow full flexibility of input termination. The ZL40218 can accept DC coupled LVPECL or LVDS and AC coupled LVPECL, LVDS, CML or HCSL input signals; single ended input signals can also be accepted. A pin compatible device with internal termination is also available.

The ZL40218 is designed to fan out low-jitter reference clocks for wired or optical communications applications while adding minimal jitter to the clock signal. An internal linear power supply regulator and bulk capacitors minimize additive jitter due to power supply noise. The device operates from 2.5V+/-5% or 3.3V+/-5% supply. Its operation is guaranteed over the industrial temperature range -40°C to +85°C.